Three Halves Make a Whole? Beating the Half-Gates Lower Bound for Garbled Circuits.
Mike RosulekLawrence RoyPublished in: IACR Cryptol. ePrint Arch. (2021)
Keyphrases
- lower bound
- logic circuits
- upper bound
- branch and bound
- tunnel diode
- low power
- branch and bound algorithm
- objective function
- np hard
- lower and upper bounds
- logic synthesis
- lower bounding
- optimal solution
- high speed
- quantum computing
- upper and lower bounds
- analog circuits
- analog vlsi
- sufficiently accurate
- vc dimension
- low cost
- worst case
- competitive ratio
- lagrangian relaxation
- real time
- delay insensitive
- linear programming
- data structure
- high level synthesis
- learning algorithm