An optoelectronic CMOS circuit implementing a simulated annealing algorithm.
Antoine DupretEric BelhaireJean-Claude RodierPhilippe LalanneDonald PrCvostPatrick GardaPierre ChavelPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- simulated annealing algorithm
- circuit design
- high speed
- analog vlsi
- simulated annealing
- delay insensitive
- cmos technology
- low voltage
- vlsi circuits
- search algorithm
- low power
- genetic algorithm
- test data generation
- low cost
- power consumption
- chip design
- nm technology
- mutation operator
- image sensor
- power supply
- power dissipation
- annealing algorithm
- tabu search
- infrared
- artificial neural networks
- metal oxide semiconductor