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Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction.
Takeshi Kitahara
Naoyuki Kawabe
Fumihiro Minami
Katsuhiro Seta
Toshiyuki Furusawa
Published in:
DATE (2005)
Keyphrases
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design methodology
power dissipation
power consumption
power reduction
low power
design process
chip design
physical design
low cost
energy efficiency
high speed
software engineering
power saving
real time
object oriented
fuzzy neural network
fuzzy logic
digital signal processing
neural network
database