Exploring Large Language Models for Verilog Hardware Design Generation.
Erik H. D'HollanderEwout DanneelsKarel-Brecht DecorteSenne LoobuyckArne VanheuleIan Van KetsDirk StroobandtPublished in: IPDPS (Workshops) (2024)
Keyphrases
- language model
- hardware design
- hardware description language
- language modeling
- n gram
- probabilistic model
- hardware implementation
- language modelling
- information retrieval
- fpga hardware
- document retrieval
- retrieval model
- speech recognition
- statistical language models
- query expansion
- test collection
- smoothing methods
- pseudo relevance feedback
- language models for information retrieval
- ad hoc information retrieval
- document ranking
- context sensitive
- relevance model
- language model for information retrieval
- query specific
- field programmable gate array
- real time