Hierarchical Networks-on-Chip Interconnect for Astrocyte-Neuron Network Hardware.
Junxiu LiuJim HarkinLiam McDaidGeorge MartinPublished in: ICANN (1) (2016)
Keyphrases
- network structure
- high bandwidth
- high speed
- network size
- low cost
- complex networks
- network model
- network topologies
- network design
- network parameters
- vlsi implementation
- network resources
- computer networks
- spiking neurons
- scale free
- functional units
- connectionist networks
- heterogeneous networks
- network traffic
- spiking neural networks
- low latency
- cellular networks
- real time
- neural network
- circuit design
- single chip
- processor core
- programmable logic
- interconnection networks
- small world
- community structure
- end to end
- power law
- social networks
- real world networks
- transport network
- wireless sensor networks
- hardware and software
- computer systems
- power dissipation
- link prediction
- network on chip
- peer to peer
- internet protocol
- routing algorithm
- digital signal processing
- low power
- hardware implementation
- high density
- massively parallel
- mobile nodes