Login / Signup
Scaling Up Modulo Scheduling for High-Level Synthesis.
Leandro de Souza Rosa
Christos-Savvas Bouganis
Vanderlei Bonato
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
Keyphrases
</>
high level synthesis
scheduling problem
parallel architecture
scheduling algorithm
resource allocation
resource constraints
parallel machines
real world
pattern recognition
round robin
optimal solution
higher order
online learning