Die Size in 90-nm CMOS.

Yong Chen Pui-In Mak Li Zhang He Qian Yan Wang

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2013)

Keyphrases

low cost
high speed
multiscale
power consumption
fixed size
cmos technology
artificial intelligence
three dimensional
data structure
standard deviation
low power
space complexity
power supply
scales linearly
metal oxide semiconductor