Gated low-power clock tree synthesis for 3D-ICs.
Tiantao LuAnkur SrivastavaPublished in: ISLPED (2014)
Keyphrases
- low power
- power consumption
- high speed
- low cost
- tree structure
- single chip
- digital signal processing
- low power consumption
- high power
- power saving
- wireless transmission
- logic circuits
- vlsi architecture
- delay insensitive
- power reduction
- cmos technology
- real time
- index structure
- vlsi circuits
- power dissipation
- general purpose
- image processing