Zhe Jiang

ORCID

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 41

Top Venues

J. Syst. Archit.

DAC

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

RTSS

University of York, UK (PHD)

Education History

University of York, UK

PHD

Publications

Ran Wei, Ruizhe Yang, Shijun Liu, Chongsheng Fan, Rong Zhou, Zekun Wu, Haochi Wang, Yifan Cai, Zhe Jiang
Towards an extensible model-based digital twin framework for space launch vehicles. J. Ind. Inf. Integr. 41 (2024)
Ran Wei, Ruizhe Yang, Shijun Liu, Chongsheng Fan, Rong Zhou, Zekun Wu, Haochi Wang, Yifan Cai, Zhe Jiang
Towards an Extensible Model-Based Digital Twin Framework for Space Launch Vehicles. CoRR (2024)
Ran Wei, Zhe Jiang, Haitao Mei, Konstantinos Barmpis, Simon Foster, Tim Kelly, Yan Zhuang
Automated Model-Based Assurance Case Management Using Constrained Natural Language. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (1) (2024)
Dawei Yang, Yan Wang, Ran Wei, Jiapeng Guan, Xiaohua Huang, Wei Cai, Zhe Jiang
An efficient multi-task learning CNN for driver attention monitoring. J. Syst. Archit. 148 (2024)
Xiaoxiang Fang, Pan Dong, Jun Luo, Leilei Li, Yan Ding, Zhe Jiang
Optimization of NUMA Aware DNN Computing System. ICIC (4) (2024)
Zhe Jiang, Kecheng Yang, Nathan Fisher, Nan Guan, Neil C. Audsley, Zheng Dong
Hopscotch: A Hardware-Software Co-Design for Efficient Cache Resizing on Multi-Core SoCs. IEEE Trans. Parallel Distributed Syst. 35 (1) (2024)
Dawei Yang, Ning He, Xing Hu, Zhihang Yuan, Jiangyong Yu, Chen Xu, Zhe Jiang
Post-training quantization for re-parameterization via coarse & fine weight splitting. J. Syst. Archit. 147 (2024)
Ning Wang, Bingkun Yao, Jie Zhou, Xi Wang, Zhe Jiang, Nan Guan
Large Language Model for Verilog Generation with Golden Code Feedback. CoRR (2024)
Ran Wei, Zhe Jiang, Xiaoran Guo, Ruizhe Yang, Haitao Mei, Athanasios Zolotas, Tim Kelly
DECISIVE: Designing Critical Systems With Iterative Automated Safety Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (5) (2024)
Zhe Jiang, Nathan Fisher, Nan Guan, Zheng Dong
BlueFace: Integrating an Accelerator into the Core's Pipeline through Algorithm-Interface Co-Design for Real-Time SoCs. DAC (2023)
Dawei Yang, Ning He, Xing Hu, Zhihang Yuan, Jiangyong Yu, Chen Xu, Zhe Jiang
Post-Training Quantization for Re-parameterization via Coarse & Fine Weight Splitting. CoRR (2023)
Zhe Jiang, Xiaotian Dai, Alan Burns, Neil C. Audsley, Zonghua Gu, Ian Gray
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems. IEEE Trans. Computers 72 (1) (2023)
Zhe Jiang, Xiaotian Dai, Ran Wei, Ian Gray, Zonghua Gu, Qingling Zhao, Shuai Zhao
NPRC-I/O: An NoC-Based Real-Time I/O System With Reduced Contention and Enhanced Predictability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Zhe Jiang, Kecheng Yang, Yunfeng Ma, Nathan Fisher, Neil C. Audsley, Zheng Dong
Towards Hard Real-Time and Energy-Efficient Virtualization for Many-Core Embedded Systems. IEEE Trans. Computers 72 (1) (2023)
Zhe Jiang, Kecheng Yang, Nathan Fisher, Ian Gray, Neil C. Audsley, Zheng Dong
AXI-IC$^{\mathrm{ RT}}$ RT : Towards a Real-Time AXI-Interconnect for Highly Integrated SoCs. IEEE Trans. Computers 72 (3) (2023)
Zhe Jiang, Xiaotian Dai, Shuai Zhao, Ran Wei, Ian Gray
Many-Core Real-Time Network-on-Chip I/O Systems for Reducing Contention and Enhancing Predictability. CPS-IoT Week Workshops (2023)
Zhe Jiang, Kecheng Yang, Neil C. Audsley, Nathan Fisher, Weisong Shi, Zheng Dong
BlueScale: a scalable memory architecture for predictable real-time computing on highly integrated SoCs. DAC (2022)
Qingling Zhao, Mengfei Qu, Bo Huang, Zhe Jiang, Haibo Zeng
Schedulability analysis and stack size minimization for adaptive mixed criticality scheduling with semi-Clairvoyance and preemption thresholds. J. Syst. Archit. 124 (2022)
Zhe Jiang, Ran Wei, Pan Dong, Yan Zhuang, Neil C. Audsley, Ian Gray
BlueVisor: Time-Predictable Hardware Hypervisor for Many-Core Embedded Systems. IEEE Trans. Computers 71 (9) (2022)
Zhe Jiang, Pan Dong, Ran Wei, Qingling Zhao, Yankai Wang, Dizhong Zhu, Yan Zhuang, Neil C. Audsley
PSpSys: A time-predictable mixed-criticality system architecture based on ARM TrustZone. J. Syst. Archit. 123 (2022)
Ran Wei, Zhe Jiang, Xiaoran Guo, Haitao Mei, Athanasios Zolotas, Tim Kelly
Designing critical systems with iterative automated safety analysis. DAC (2022)
Zhe Jiang, Xiaotian Dai, Pan Dong, Ran Wei, Dawei Yang, Neil C. Audsley, Nan Guan
Toward an Analysable, Scalable, Energy-Efficient I/O Virtualization for Mixed-Criticality Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (2) (2022)
Zhe Jiang, Shuai Zhao, Ran Wei, Dawei Yang, Richard Paterson, Nan Guan, Yan Zhuang, Neil C. Audsley
Bridging the Pragmatic Gaps for Mixed-Criticality Systems in the Automotive Industry. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (4) (2022)
Zhe Jiang, Kecheng Yang, Nathan Fisher, Neil C. Audsley, Zheng Dong
Towards an energy-efficient quarter-clairvoyant mixed-criticality system. J. Syst. Archit. 130 (2022)
Zhe Jiang, Neil C. Audsley, Dayu Shill, Kecheng Yang, Nathan Fisher, Zheng Dong
: Towards a Real-Time AXI-Interconnect for System-on-Chips. RTAS (2021)
Pan Yang, Pan Dong, Zhe Jiang, Jintao Xia, Yan Ding
Work-in-Progress: a static partition for shared cache in mixed-time-sensitive system with balanced performance. RTCSA (2021)
Zhe Jiang, Xiaotian Dai, Neil C. Audsley
HIART-MCS: High Resilience and Approximated Computing Architecture for Imprecise Mixed-Criticality Systems. RTSS (2021)
Yankai Wang, Dawei Yang, Wei Zhang, Zhe Jiang, Wenqiang Zhang
Adaptable Ensemble Distillation. ICASSP (2021)
Zhe Jiang, Kecheng Yang, Yunfeng Ma, Nathan Fisher, Neil C. Audsley, Zheng Dong
I/O-GUARD: Hardware/Software Co-Design for I/O Virtualization with Guaranteed Real-time Performance. DAC (2021)
Shuai Zhao, Zhe Jiang, Xiaotian Dai, Iain Bate, Ibrahim Habli, Wanli Chang
Timing-Accurate General-Purpose I/O for Multi- and Many-Core Systems: Scheduling and Hardware Support. DAC (2020)
Zhe Jiang, Kecheng Yang, Nathan Fisher, Neil C. Audsley, Zheng Dong
Pythia-MCS: Enabling Quarter-Clairvoyance in I/O-Driven Mixed-Criticality Systems. RTSS (2020)
Pan Dong, Zhe Jiang, Alan Burns, Yan Ding, Jun Ma
Build real-time communication for hybrid dual-OS system. J. Syst. Archit. 107 (2020)
Dawei Yang, Xinlei Li, Xiaotian Dai, Rui Zhang, Lizhe Qi, Wenqiang Zhang, Zhe Jiang
All In One Network for Driver Attention Monitoring. ICASSP (2020)
Zhe Jiang, Shuai Zhao, Pan Dong, Dawei Yang, Ran Wei, Nan Guan, Neil C. Audsley
Re-Thinking Mixed-Criticality Architecture for Automotive Industry. ICCD (2020)
Pan Dong, Zhe Jiang, Alan Burns, Yan Ding, Jun Ma
Work-in-Progress: Real-Time RPC for Hybrid Dual-OS System. RTSS (2019)
Zhe Jiang, Neil C. Audsley, Pan Dong
BlueIO: A Scalable Real-Time Hardware I/O Virtualization System for Many-core Embedded Systems. ACM Trans. Embed. Comput. Syst. 18 (3) (2019)
Zhe Jiang, Neil C. Audsley, Pan Dong, Nan Guan, Xiaotian Dai, Lifeng Wei
MCS-IOV: Real-Time I/O Virtualization for Mixed-Criticality Systems. RTSS (2019)
Pan Dong, Alan Burns, Zhe Jiang, Xiangke Liao
TZDKS: A New TrustZone-Based Dual-Criticality System with Balanced Performance. RTCSA (2018)
Zhe Jiang, Neil C. Audsley, Pan Dong
BlueVisor: A Scalable Real-Time Hardware Hypervisor for Many-Core Embedded Systems. RTAS (2018)
Zhe Jiang, Neil C. Audsley
GPIOCP: Timing-accurate general purpose I/O controller for many-core real-time systems. DATE (2017)
Zhe Jiang, Neil C. Audsley
VCDC: The Virtualized Complicated Device Controller. ECRTS (2017)

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Publication Activity (10 Years)

Top Topics

Top Venues

Zhe Jiang