Yung-Yuan Chen

Publication Activity (10 Years)

Years Active: 1990-2024
Publications (10 Years): 9

Top Topics

Support Systems

Top Venues

Publications

Hsiang Huang, Yung-Yuan Chen
Development of an Effective Corruption-Related Scenario-Based Testing Approach for Robustness Verification and Enhancement of Perception Systems in Autonomous Driving. Sensors 24 (1) (2024)
Zong-Ming Lin, Cheng-Yang Chang, Chin-Yu Hu, Yung-Yuan Chen
Intelligent Traffic Control System by Using Image Information. CoRR (2021)
Kuen-Long Lu, Yung-Yuan Chen
Model-based design, analysis and assessment framework for safety-critical systems. DSN (Supplements) (2021)
Kuen-Long Lu, Yung-Yuan Chen
SoC-Level Safety-Oriented Design Process in Electronic System Level Development Environment. J. Circuits Syst. Comput. 30 (14) (2021)
Hsiang Huang, Kuan-Chung Chen, Po-Yi Li, Yung-Yuan Chen
Analysis of the Effect of Automotive Ethernet Camera Image Quality on Object Detection Models. ICAIIC (2020)
Yan-Xun LU, Yung-Yuan Chen, Wen-Nan Fang
Automotive Ethernet-Based Black Box System. ICAIIC (2020)
Kuen-Long Lu, Yung-Yuan Chen
ISO 26262 ASIL-Oriented Hardware Design Framework for Safety-Critical Automotive Systems. ICCVE (2019)
Kuen-Long Lu, Yung-Yuan Chen, Li-Ren Huang
FMEDA-Based Fault Injection and Data Analysis in Compliance with ISO-26262. DSN Workshops (2018)
Yung-Yuan Chen, Kuen-Long Leu
An Effective Two-Level Redundancy Approach for FlexRay Network Systems. DSN Workshops (2016)
Hsiang Huang, Kuen-Long Leu, Yung-Yuan Chen
An effective multiple-level fault-tolerant framework for FlexRay network systems. ICCVE (2015)
Kuen-Long Leu, Hsiang Huang, Yung-Yuan Chen, Li-Ren Huang, Kung-Ming Ji
An intelligent brake-by-wire system design and analysis in accordance with ISO-26262 functional safety standard. ICCVE (2015)
Kuen-Long Leu, Jwu-E Chen, Chin-Long Wey, Yung-Yuan Chen
Generic Reliability Analysis for Safety-Critical FlexRay Drive-By-Wire Systems. ICCVE (2012)
Yung-Yuan Chen, Chia-Ming Lyu
ECU-level fault-tolerant framework for safety-critical FlexRay network systems. ICTC (2012)
Yung-Yuan Chen, Kuen-Long Leu
Reliable data path design of VLIW processor cores with comprehensive error-coverage assessment. Microprocess. Microsystems 34 (1) (2010)
Kuen-Long Leu, Chin-Long Wey, Jwu-E Chen, Yung-Yuan Chen
Robustness investigation of the FlexRay system. SIES (2009)
Yung-Yuan Chen, Chung-Hsien Hsu, Kuen-Long Leu
SoC-level risk assessment using FMEA approach in system design with SystemC. SIES (2009)
Kun-Chun Chang, Yi-Chinag Wang, Chung-Hsien Hsu, Kuen-Long Leu, Yung-Yuan Chen
System-Bus Fault Injection Framework in SystemC Design Platform. SSIRI (2008)
Hung-Chuan Lai, Shi-Jinn Horng, Yung-Yuan Chen
An Online Control Flow Check for VLIW Processor. PRDC (2008)
Yung-Yuan Chen, Shu-Hao Hsu, Kuen-Long Leu
An Estimation Model of Vulnerability for Embedded Microprocessors. SSIRI (2008)
Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin
Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors. CDES (2006)
Yung-Yuan Chen, Kuen-Long Leu, Chao-Sung Yeh
Fault-Tolerant VLIW Processor Design and Error Coverage Analysis. EUC (2006)
Yung-Yuan Chen
Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring. IEEE Trans. Computers 54 (10) (2005)
Yung-Yuan Chen, Kun-Feng Chen
Incorporating Signature-Monitoring Technique in VLIW Processors. DFT (2004)
Yung-Yuan Chen, Shi-Jinn Horng, Hung-Chuan Lai
An Integrated Fault-Tolerant Design Framework for VLIW Processors. DFT (2003)
Yung-Yuan Chen
Concurrent Detection of Processor Control Errors by Hybrid Signature Monitoring. EDCC (1999)
Yung-Yuan Chen, Shambhu J. Upadhyaya, Ching-Hwa Cheng
A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors. IEEE Trans. Computers 46 (12) (1997)
Yung-Yuan Chen, Ching-Hwa Cheng, Jwu-E Chen
An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors. VLSI Design (1995)
Yung-Yuan Chen, Shambhu J. Upadhyaya
Modeling the Reliability of a Class of Fault-Tolerant VLSI/WSI Systems Based on Multiple-Level Redundancy. IEEE Trans. Computers 43 (6) (1994)
Yung-Yuan Chen, Ching-Hwa Cheng, Yung-Ci Chou
An Effective Reconfiguration Process for Fault-Tolerant VLSI/WSI Array Processors. EDCC (1994)
Yung-Yuan Chen, Shambhu J. Upadhyaya
Reliability, Reconfiguration, and Spare Allocation Issues in Binary-Tree Architectures Based on Multiple-Level Redundancy. IEEE Trans. Computers 42 (6) (1993)
Yung-Yuan Chen, Shambhu J. Upadhyaya
Yield Analysis of Reconfigurable Array Processors Based on Multiple-Level Redundancy. IEEE Trans. Computers 42 (9) (1993)
Yung-Yuan Chen, Shambhu J. Upadhyaya
An analysis of a reconfigurable binary tree architecture based on multiple-level redundancy. FTCS (1990)