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Yue Zha
ORCID
Publication Activity (10 Years)
Years Active: 2016-2022
Publications (10 Years): 19
Top Topics
Memory Size
Reconfigurable Architecture
Network Intrusion
Routing Algorithm
Top Venues
IEEE Comput. Archit. Lett.
FPGA
ASPLOS
ISCA
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Publications
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Yue Zha
,
Jing Li
Revisiting PathFinder Routing Algorithm.
FPGA
(2022)
Yue Zha
,
Jing Li
Hetero-ViTAL: A Virtualization Stack for Heterogeneous FPGA Clusters.
ISCA
(2021)
Yue Zha
,
Jing Li
When application-specific ISA meets FPGAs: a multi-layer virtualization framework for heterogeneous cloud FPGAs.
ASPLOS
(2021)
Yue Zha
,
Jing Li
Hyper-Ap: Enhancing Associative Processing Through A Full-Stack Optimization.
ISCA
(2020)
Yue Zha
,
Etienne Nowak
,
Jing Li
Liquid Silicon: A Nonvolatile Fully Programmable Processing-in-Memory Processor With Monolithically Integrated ReRAM.
IEEE J. Solid State Circuits
55 (4) (2020)
Yue Zha
,
Jing Li
Virtualizing FPGAs in the Cloud.
ASPLOS
(2020)
Jialiang Zhang
,
Yue Zha
,
Nicholas Beckwith
,
Bangya Liu
,
Jing Li
MEG: A RISCV-based System Emulation Infrastructure for Near-data Processing Using FPGAs and High-bandwidth Memory.
ACM Trans. Reconfigurable Technol. Syst.
13 (4) (2020)
Jialiang Zhang
,
Yang Liu
,
Gaurav Jain
,
Yue Zha
,
Jonathan Ta
,
Jing Li
MEG: A RISCV-Based System Simulation Infrastructure for Exploring Memory Optimization Using FPGAs and Hybrid Memory Cube.
FCCM
(2019)
Yue Zha
,
Etienne Nowak
,
Jing Li
Liquid Silicon: A Nonvolatile Fully Programmable Processing-In-Memory Processor with Monolithically Integrated ReRAM for Big Data/Machine Learning Applications.
VLSI Circuits
(2019)
Yue Zha
,
Jing Li
Liquid Silicon-Monona: A Reconfigurable Memory-Oriented Computing Fabric with Scalable Multi-Context Support.
ASPLOS
(2018)
Soroosh Khoram
,
Yue Zha
,
Jing Li
An Alternative Analytical Approach to Associative Processing.
IEEE Comput. Archit. Lett.
17 (2) (2018)
Yue Zha
,
Jing Li
Liquid Silicon: A Data-Centric Reconfigurable Architecture Enabled by RRAM Technology.
FPGA
(2018)
Yue Zha
,
Jing Li
Specialization: A New Path Towards Low Power.
J. Low Power Electron.
14 (2) (2018)
Yue Zha
,
Jing Li
CMA: A Reconfigurable Complex Matching Accelerator for Wire-Speed Network Intrusion Detection.
IEEE Comput. Archit. Lett.
17 (1) (2018)
Soroosh Khoram
,
Yue Zha
,
Jialiang Zhang
,
Jing Li
Challenges and Opportunities: From Near-memory Computing to In-memory Computing.
ISPD
(2017)
Yue Zha
,
Jialiang Zhang
,
Zhiqiang Wei
,
Jing Li
A Mixed-Signal Data-Centric Reconfigurable Architecture enabled by RRAM Technology (Abstract Only).
FPGA
(2017)
Yue Zha
,
Jing Li
IMEC: A Fully Morphable In-Memory Computing Fabric Enabled by Resistive Crossbar.
IEEE Comput. Archit. Lett.
16 (2) (2017)
Yue Zha
,
Jing Li
RRAM-based reconfigurable in-memory computing architecture with hybrid routing.
ICCAD
(2017)
Yue Zha
,
Jing Li
Reconfigurable in-memory computing with resistive memory crossbar.
ICCAD
(2016)