Yiyu Tan

Publication Activity (10 Years)

Years Active: 2005-2023
Publications (10 Years): 10

Top Topics

Hardware Design

High Performance Computing

Top Venues

IPDPS Workshops

Publications

Boma A. Adhi, Carlos Cortes, Emanuele Del Sozzo, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC. IPDPS Workshops (2023)
Boma A. Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation. IPDPS Workshops (2022)
Boma A. Adhi, Carlos Cortes, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage. FPT (2022)
Boma A. Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC. CLUSTER (2022)
Takuya Kojima, Boma A. Adhi, Carlos Cortes, Yiyu Tan, Kentaro Sano
An Architecture- Independent CGRA Compiler enabling OpenMP Applications. IPDPS Workshops (2022)
Yiyu Tan, Toshiyuki Imamura
An FPGA-based Sound Field Rendering System. CLUSTER (2020)
Roman Iakymchuk, Daichi Mukunoki, Artur Podobas, Fabienne Jézéquel, Toshiyuki Imamura, Norihisa Fujita, Jens Huthmann, Shuhei Kudo, Yiyu Tan, Jens Domke, Kai Torben Ohlhus, Takeshi Fukaya, Takeo Hoshi, Yuki Murakami, Maho Nakata, Takeshi Ogita, Kentaro Sano, Taisuke Boku
White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing. CoRR (2020)
Yiyu Tan, Toshiyuki Imamura, Daichi Mukunoki
Design of an FPGA-Based Matrix Multiplier with Task Parallelism. PARCO (2019)
Yiyu Tan, Toshiyuki Imamura
Performance Evaluation of a Toolkit for Sparse Tensor Decomposition. HPDC (Posters/Doctoral Consortium) (2018)
Yiyu Tan, Toshiyuki Imamura
An energy-efficient FPGA-based matrix multiplier. ICECS (2017)
Yiyu Tan, Chihang Yau, Anthony S. Fong, Xiaojian Yang
An instruction folding solution for a Java processor. Comput. Syst. Sci. Eng. 24 (3) (2009)
Yiyu Tan, Chihang Yau, Anthony S. Fong
A Object Model for Java and Its Architectural Support. ITNG (2009)
Chihang Yau, Yiyu Tan, Anthony Shi-Sheung Fong, Pak Lun Mok
An Extensive Hardware/Software Co-design on a Descriptor-Based Embedded Java Processor. ICYCS (2008)
Yiyu Tan, Anthony S. Fong, Xiaojian Yang
An Instruction Folding Solution to a Java Processor. NPC (2007)
Yiyu Tan, Anthony S. Fong, Xiaojian Yang
Architectural Solution to Object-Oriented Programming. Asia-Pacific Computer Systems Architecture Conference (2007)
Yiyu Tan, Lo Wan Yiu, Chihang Yau, Richard Li, Anthony S. Fong
A Java processor with hardware-support object-oriented instructions. Microprocess. Microsystems 30 (8) (2006)
Yiyu Tan, Chihang Yau, Anthony S. Fong
Architectural Support on Object-Oriented Programming in a JAVA Processor. ASAP (2006)
Chihang Yau, Yiyu Tan, Pak Lun Mok, Wing Shing Yu, Anthony S. Fong
A Hardware/Software Co-design and Co-verification on a Novel Embedded Object-Oriented Processor. EUC (2005)
Chihang Yau, Yiyu Tan, Anthony S. Fong
A Novel Just-In-Time Compiler on an Embedded Object-Oriented Processor. CIT (2005)
Chihang Yau, Yiyu Tan, Anthony S. Fong, Wing Shing Yu
Hardware Concurrent Garbage Collection for Short-Lived Objects in Mobile Java Devices. EUC (2005)
Yiyu Tan, Chihang Yau, Kaiman Lo, Pak Lun Mok, Anthony S. Fong
A Novel JAVA Processor for Embedded Devices. SAMOS (2005)