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Yiwen Wang
Publication Activity (10 Years)
Years Active: 2002-2010
Publications (10 Years): 0
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Publications
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Chengpin Tseng
,
Chiuyun Hung
,
De-Sheng Chen
,
Kuei-Chung Chang
,
Yiwen Wang
Application Specific Instruction Set Exploration on VLIW Architectures.
ESA
(2010)
Jiying Wu
,
Chijie Lin
,
Desheng Chen
,
Yiwen Wang
Memory Models for an Application-Specific Instruction-set Processor Design Flow.
ICESS
(2008)
Chijie Lin
,
Jiying Wu
,
Jerung Shiu
,
Chiuyun Hung
,
De-Sheng Chen
,
Yiwen Wang
Performance Improvement using Application-Specific Instructions under Hardware Constraints.
ICESS
(2008)
Shengjyi Yang
,
Chijie Lin
,
Chiuyun Hung
,
Jiying Wu
,
Yiwen Wang
Application-Specific Instruction Generation for SOC Processors.
ISCAS
(2007)
De-Sheng Chen
,
Chang-Tzu Lin
,
Yiwen Wang
,
Ching-Hwa Cheng
Fixed-outline floorplanning using robust evolutionary search.
Eng. Appl. Artif. Intell.
20 (6) (2007)
Chang-Tzu Lin
,
Tai-Wei Kung
,
De-Sheng Chen
,
Yiwen Wang
,
Ching-Hwa Cheng
Noise-Aware Floorplanning for Fast Power Supply Network Design.
ISCAS
(2007)
Chang-Tzu Lin
,
De-Sheng Chen
,
Yiwen Wang
Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm.
J. Circuits Syst. Comput.
15 (1) (2006)
Chang-Tzu Lin
,
De-Sheng Chen
,
Yiwen Wang
,
Hsin-Hsien Ho
Modem floorplanning with abutment and fixed-outline constraints.
ISCAS (6)
(2005)
Ching-Chung Hu
,
De-Sheng Chen
,
Yiwen Wang
Fast multilevel floorplanning for large scale modules.
ISCAS (5)
(2004)
Chang-Tzu Lin
,
De-Sheng Chen
,
Yiwen Wang
Robust fixed-outline floorplanning through evolutionary search.
ASP-DAC
(2004)
De-Sheng Chen
,
Chang-Tzu Lin
,
Yiwen Wang
Non-slicing floorplans with boundary constraints using generalized polish expression.
ASP-DAC
(2003)
Chang-Tzu Lin
,
De-Sheng Chen
,
Yiwen Wang
GPE: A New Representation for VLSI Floorplan Problem.
ICCD
(2002)