Ying Zhang

Publication Activity (10 Years)

Years Active: 2010-2017
Publications (10 Years): 6

Top Topics

Multi Processor

Efficient Execution

Top Venues

Microprocess. Microsystems

IEEE Trans. Computers

Publications

Shaoming Chen, Samuel Irving, Lu Peng, Yue Hu, Ying Zhang, Ashok Srivastava
Using Switchable Pins to Increase Off-Chip Bandwidth in Chip-Multiprocessors. IEEE Trans. Parallel Distributed Syst. 28 (1) (2017)
Ying Zhang, Li Zhao, Ramesh Illikkal, Ravi R. Iyer, Andrew Herdrich, Lu Peng
QoS Management on Heterogeneous Architecture for Multiprogrammed, Parallel, and Domain-Specific Applications. IEEE Syst. J. 11 (4) (2017)
Ying Zhang, Samuel Irving, Lu Peng, Xin Fu, David M. Koppelman, Weihua Zhang, Jesse Ardonne
Design space exploration for device and architectural heterogeneity in chip-multiprocessors. Microprocess. Microsystems 40 (2016)
Shaoming Chen, Lu Peng, Yue Hu, Zhou Zhao, Ashok Srivastava, Ying Zhang, Jin-Woo Choi, Bin Li, Edward Song
Powering Up Dark Silicon: Mitigating the Limitation of Power Delivery via Dynamic Pin Switching. IEEE Trans. Emerg. Top. Comput. 3 (4) (2015)
Ying Zhang, Sui Chen, Lu Peng, Shaoming Chen
NBTI alleviation on FinFET-made GPUs by utilizing device heterogeneity. Integr. 51 (2015)
Ying Zhang, Lide Duan, Bin Li, Lu Peng, Sadagopan Srinivasan
Cross-architecture prediction based scheduling for energy efficient execution on single-ISA heterogeneous chip-multiprocessors. Microprocess. Microsystems 39 (4-5) (2015)
Ying Zhang, Li Zhao, Ramesh Illikkal, Ravi R. Iyer, Andrew Herdrich, Lu Peng
QoS management on heterogeneous architecture for parallel applications. ICCD (2014)
Ying Zhang, Sui Chen, Lu Peng, Shaoming Chen
Mitigating NBTI Degradation on FinFET GPUs through Exploiting Device Heterogeneity. ISVLSI (2014)
Lide Duan, Ying Zhang, Bin Li, Lu Peng
Comprehensive and Efficient Design Parameter Selection for Soft Error Resilient Processors via Universal Rules. IEEE Trans. Computers 63 (9) (2014)
Shaoming Chen, Yue Hu, Ying Zhang, Lu Peng, Jesse Ardonne, Samuel Irving, Ashok Srivastava
Increasing off-chip bandwidth in multi-core processors with switchable pins. ISCA (2014)
Ying Zhang, Lide Duan, Bin Li, Lu Peng, Xin Fu
Design configuration selection for hard-error reliable processors via statistical rules. Microprocess. Microsystems 38 (1) (2014)
Ying Zhang, Lide Duan, Bin Li, Lu Peng, Sadagopan Srinivasan
Energy efficient job scheduling in single-ISA heterogeneous chip-multiprocessors. ISQED (2014)
Ying Zhang, Lu Peng, Xin Fu, Yue Hu
Lighting the dark silicon by exploiting heterogeneity on future processors. DAC (2013)
Ying Zhang, Lide Duan, Bin Li, Lu Peng
Optimal microarchitectural design configuration selection for processor hard-error reliability. ISQED (2012)
Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir
Tree structured analysis on GPU power study. ICCD (2011)
Ying Zhang, Lu Peng, Bin Li, Jih-Kwon Peir, Jianmin Chen
Architecture comparisons between Nvidia and ATI GPUs: Computation parallelism and data communications. IISWC (2011)
Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir
Statistical GPU power analysis using tree-based methods. IGCC (2011)
Lide Duan, Ying Zhang, Bin Li, Lu Peng
Universal rules guided design parameter selection for soft error resilient processors. ISPASS (2011)
Ying Zhang, Yue Hu, Bin Li, Lu Peng
Performance and Power Analysis of ATI GPU: A Statistical Approach. NAS (2011)
Ying Zhang, Lu Peng, Wencheng Lu, Lide Duan, Suresh Rai
Expediating IP lookups with reduced power via TBM and SST supernode caching. Comput. Commun. 33 (3) (2010)