Yaseer Arafat Durrani

Publication Activity (10 Years)

Years Active: 2006-2021
Publications (10 Years): 3

Top Topics

Abstraction Levels

Countermeasures

Top Venues

J. Low Power Electron.

Turkish J. Electr. Eng. Comput. Sci.

Microprocess. Microsystems

Circuits Syst. Signal Process.

Publications

Faisal Siddiq, Yaseer Arafat Durrani
Efficient power macromodeling approach for an IP-based SoC system using discrete water cycle algorithm. Turkish J. Electr. Eng. Comput. Sci. 29 (3) (2021)
Yaseer Arafat Durrani
Power Analysis Approach for NoC-based Homogeneous Stacked 3D ICs. J. Circuits Syst. Comput. 27 (2) (2018)
Yaseer Arafat Durrani, Teresa Riesgo
Efficient power analysis approach and its application to system-on-chip design. Microprocess. Microsystems 46 (2016)
Yaseer Arafat Durrani, Teresa Riesgo
Power estimation for intellectual property-based digital systems at the architectural level. J. King Saud Univ. Comput. Inf. Sci. 26 (3) (2014)
Yaseer Arafat Durrani, Teresa Riesgo
High-Level Power Analysis for Intellectual Property-Based Digital Systems. Circuits Syst. Signal Process. 33 (4) (2014)
Yaseer Arafat Durrani, Teresa Riesgo
High-Level Power Analysis for Intellectual Property-Based Digital Systems. J. Low Power Electron. 9 (4) (2013)
Yaseer Arafat Durrani
Efficient power macromodeling technique for conventional MOS transistors. ICEEI (2011)
Yaseer Arafat Durrani, Teresa Riesgo
Power estimation technique for DSP architectures. Digit. Signal Process. 19 (2) (2009)
Yaseer Arafat Durrani, Teresa Riesgo
LUT-Based Power Macromodeling Technique for DSP Architectures. ICECS (2007)
Yaseer Arafat Durrani, Teresa Riesgo
Architectural Power Analysis for Intellectual Property-Based Digital System. J. Low Power Electron. 3 (3) (2007)
Yaseer Arafat Durrani, Ana Abril, Teresa Riesgo
Efficient Power Macromodeling Technique for IP-Based Digital System. ISCAS (2007)
Yaseer Arafat Durrani, Teresa Riesgo
Power Estimation for IP-Based Modules. SoC (2006)
Yaseer Arafat Durrani, Teresa Riesgo
Power Macromodeling for High Level Power Estimation. ReCoSoC (2006)
Yaseer Arafat Durrani, Teresa Riesgo, Felipe Machado
Power estimation for register transfer level by genetic algorithm. ICINCO-RA (2006)
Yaseer Arafat Durrani, Teresa Riesgo
Power Macromodeling for IP Modules. ICECS (2006)