Yao Liu

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 10

Top Topics

Digital Signature

Hardware Architecture

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IACR Trans. Cryptogr. Hardw. Embed. Syst.

Publications

Junhao Huang, Alexandre Adomnicai, Jipeng Zhang, Wangchen Dai, Yao Liu, Ray C. C. Cheung, Çetin Kaya Koç, Donglong Chen
Revisiting Keccak and Dilithium Implementations on ARMv7-M. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024 (2) (2024)
Zhishuo Huang, Jia Tao, Haosong Zhao, Donglong Chen, Shuyan Zhu, Yinjin Fu, Nong Xiao, Yao Liu
Unified Lossless-Throughput Architecture for AES and SM4 Encryption with Changeable Keys. ISCAS (2024)
Gaoyu Mao, Yao Liu, Wangchen Dai, Guangyan Li, Zhewen Zhang, Alan H. F. Lam, Ray C. C. Cheung
REALISE-IoT: RISC-V-Based Efficient and Lightweight Public-Key System for IoT Applications. IEEE Internet Things J. 11 (2) (2024)
Yao Liu, Junyi Zhang, Shuo Liu, Qiaoling Wang, Wangchen Dai, Ray Chak-Chung Cheung
Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Jingwei Hu, Yao Liu, Ray C. C. Cheung, Shivam Bhasin, San Ling, Huaxiong Wang
Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2020)
Shuo Liu, Qiaoling Wang, Junyi Zhang, Qinliang Lin, Yao Liu, Meng Xu, Ray C. C. Chueng, Jianfei He
NetReduce: RDMA-Compatible In-Network Reduction for Distributed DNN Training Acceleration. CoRR (2020)
Zhenya Zang, Yao Liu, Ray C. C. Cheung
Reconfigurable RISC-V Secure Processor And SoC Integration. ICIT (2019)
Yao Liu, Xiao-Zhou Li, Ray C. C. Cheung, Sze-Chun Chan, Hei Wong
High-Speed Discrete Gaussian Sampler With Heterodyne Chaotic Laser Inputs. IEEE Trans. Circuits Syst. II Express Briefs (6) (2018)
Yao Liu, Ray C. C. Cheung, Hei Wong
Lightweight Secure Processor Prototype on FPGA. FPL (2018)
Yao Liu, Ray C. C. Cheung, Hei Wong
A Bias-Bounded Digital True Random Number Generator Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2017)