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V. Duraisamy
Publication Activity (10 Years)
Years Active: 2007-2014
Publications (10 Years): 0
Top Topics
Logic Circuits
Energy Efficient
Ultra Low Power
Ant Colony Optimization
Top Venues
Wirel. Pers. Commun.
VLSI Design
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Publications
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V. Balaji
,
V. Duraisamy
Ant Optimized Link Quality for Ad Hoc on Demand Distance Vector.
Wirel. Pers. Commun.
79 (1) (2014)
A. Kishore Kumar
,
D. Somasundareswari
,
V. Duraisamy
,
T. Shunbaga Pradeepa
Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL.
VLSI Design
2013 (2013)
V. Duraisamy
,
N. Devarajan
,
D. Somasundareswari
,
A. Antony Maria Vasanth
,
S. N. Sivanandam
Neuro fuzzy schemes for fault detection in power transformer.
Appl. Soft Comput.
7 (2) (2007)