Tsung-Yuan Huang

Publication Activity (10 Years)

Years Active: 2011-2020
Publications (10 Years): 3

Top Topics

Multicore Processors

Top Venues

IEEE Trans. Parallel Distributed Syst.

IEEE J. Solid State Circuits

Publications

Cheng-Xin Xue, Tsung-Yuan Huang, Je-Syu Liu, Ting-Wei Chang, Hui-Yao Kao, Jing-Hong Wang, Ta-Wei Liu, Shih-Ying Wei, Sheng-Po Huang, Wei-Chen Wei, Yi-Ren Chen, Tzu-Hsiang Hsu, Yen-Kai Chen, Yun-Chen Lo, Tai-Hsing Wen, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices. ISSCC (2020)
Cheng-Xin Xue, Ting-Wei Chang, Tung-Cheng Chang, Hui-Yao Kao, Yen-Cheng Chiu, Chun-Ying Lee, Ya-Chin King, Chrong Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Wei-Hao Chen, Meng-Fan Chang, Je-Syu Liu, Jia-Fang Li, Wei-Yu Lin, Wei-En Lin, Jing-Hong Wang, Wei-Chen Wei, Tsung-Yuan Huang
Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors. IEEE J. Solid State Circuits 55 (1) (2020)
Cheng-Xin Xue, Wei-Hao Chen, Je-Syu Liu, Jia-Fang Li, Wei-Yu Lin, Wei-En Lin, Jing-Hong Wang, Wei-Chen Wei, Ting-Wei Chang, Tung-Cheng Chang, Tsung-Yuan Huang, Hui-Yao Kao, Shih-Ying Wei, Yen-Cheng Chiu, Chun-Ying Lee, Chung-Chuan Lo, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors. ISSCC (2019)
Gwo Giun Lee, He-Yuan Lin, Chun-Fu Chen, Tsung-Yuan Huang
Quantifying Intrinsic Parallelism Using Linear Algebra for Algorithm/Architecture Coexploration. IEEE Trans. Parallel Distributed Syst. 23 (5) (2012)
Tsung-Yuan Huang, He-Yuan Lin, Chun-Fu Chen, Gwo Giun Lee
Reconfigurable inverse transform architecture for multiple purpose video coding. ISCAS (2011)