Sitaran Yadavalli

Publication Activity (10 Years)

Years Active: 1995-1999
Publications (10 Years): 0

Publications

Sitaran Yadavalli, Sudhakar M. Reddy
SymSim: symbolic fault simulation of data-flow data-path designs at the Register-Transfer level. ITC (1999)
Sitaran Yadavalli, Irith Pomeranz, Sudhakar M. Reddy
MUSTC-Testing: Multi-Stage-Combinational Test scheduling at the Register-Transfer Level. VLSI Design (1995)