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Shwetha Vijayakumar
ORCID
Publication Activity (10 Years)
Years Active: 2021-2024
Publications (10 Years): 3
Top Topics
Original Data
Data Transfer
Xml Documents
Memory Capacity
Top Venues
CoRR
ACM Great Lakes Symposium on VLSI
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Publications
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Zihan Yin
,
Annewsha Datta
,
Shwetha Vijayakumar
,
Ajey P. Jacob
,
Akhilesh Jaiswal
A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation.
ACM Great Lakes Symposium on VLSI
(2024)
Zihan Yin
,
Annewsha Datta
,
Shwetha Vijayakumar
,
Ajey J. Jacob
,
Akhilesh R. Jaiswal
A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation.
CoRR
(2023)
Haripriya Sheshadri
,
Shwetha Vijayakumar
,
Ajey Jacob
,
Akhilesh Jaiswal
Augmented Memory Computing: Dynamically Augmented SRAM Storage for Data Intensive Applications.
CoRR
(2021)