Shugang Wei

Publication Activity (10 Years)

Years Active: 1990-2020
Publications (10 Years): 2

Top Topics

Fpga Implementation

Top Venues

IEICE Electron. Express

Publications

Yuuki Tanaka, Yuuki Suzuki, Shugang Wei
Novel Binary Signed-Digit Addition Algorithm for FPGA Implementation. J. Circuits Syst. Comput. 29 (9) (2020)
Shugang Wei
Computation of modular multiplicative inverses using residue signed-digit additions. ISOCC (2016)
Shugang Wei
Fast signed-digit arithmetic circuits for residue number systems. ICECS (2015)
Shugang Wei
Conversions between RNS and mixed-radix numbers using signed-digit arithmetic. ISIC (2014)
Yuuki Tanaka, Shugang Wei
Efficient squaring circuit using canonical signed-digit number representation. IEICE Electron. Express 11 (2) (2014)
Changjun Jiang, Shugang Wei
} USING SIGNED-DIGIT NUMBER. J. Circuits Syst. Comput. 22 (1) (2013)
Mingda Zhang, Shugang Wei
High-Speed Modular Multipliers Based on a New Binary Signed-Digit Adder Tree Structure. J. Circuits Syst. Comput. 22 (6) (2013)
Changjun Jiang, Shugang Wei
} using signed-digit number. NEWCAS (2012)
Shugang Wei
An RSA encryption implementation method using residue signed-digit arithmetic circuits. BMEI (2012)
Mingda Zhang, Shugang Wei
Efficient residue checker using new binary modular adder tree structure for error detection of arithmetic. FSKD (2011)
Shuangching Chen, Shugang Wei
+1). Inf. Media Technol. 1 (2) (2006)
Shugang Wei, Kensuke Shimizu
plusminus 1) Multipliers Using a Three-operand Modular Signed-digit Addition Algorithm. J. Circuits Syst. Comput. 15 (1) (2006)
Shuangching Chen, Shugang Wei
+1) signed-digit architectures. ISCAS (2006)
Shuangching Chen, Shugang Wei
Multipliers with Signed-Digit Number Arithmetic. Inf. Media Technol. 1 (1) (2006)
Shugang Wei, Kensuke Shimizu
Dynamic Range Compression Characteristics Using an Interpolating Polynomial for Digital Audio Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2005)
Shugang Wei
) signed-digit arithmetic. SBCCI (2005)
Shugang Wei, Kensuke Shimizu
± 1) multipliers using a three-operand modular addition and Booth recoding based on signed-digit number arithmetic. ISCAS (5) (2003)
Shugang Wei, Kensuke Shimizu
Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits. J. Circuits Syst. Comput. 12 (1) (2003)
Shugang Wei, Shuangching Chen, Kensuke Shimizu
Fast modular multiplication using Booth recoding based on signed-digit number arithmetic. APCCAS (2) (2002)
Shugang Wei, Kensuke Shimizu
Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processor. ICECS (2002)
Shugang Wei, Kensuke Shimizu
Error Detection of Arithmetic Circuits Using a Residue Checker with Signed-Digit Number System. DFT (2001)
Shugang Wei, Kensuke Shimizu
Fast residue arithmetic multipliers based on signed-digit number system. ICECS (2001)
Shugang Wei, Kensuke Shimizu
Residue arithmetic circuits using a signed-digit number representation. ISCAS (2000)
Shugang Wei, Kensuke Shimizu
Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits. VLSI Design (1999)
Shugang Wei, Kensuke Shimizu
Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation. Great Lakes Symposium on VLSI (1999)
Shugang Wei, Kensuke Shimizu
Residue Arithmetic Circuits Based on the Signed-Digit Multiple-Valued Arithmetic Circuits. ISMVL (1998)
Shugang Wei, Michitaka Kameyama, Tatsuo Higuchi
Performance evaluation of a multivalued rsa encryption vlsi. Systems and Computers in Japan 22 (7) (1991)
Michitaka Kameyama, Shugang Wei, Tatsuo Higuchi
Design of an RSA Encryption Processor Based on Signed-Digit Multivalued Arithmetic Circuits. Systems and Computers in Japan 21 (6) (1990)