Rasika Dhavse

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 4

Top Topics

Finite Impulse Response

Hardware Architecture

Power Consumption

Vlsi Implementation

Top Venues

Int. J. Circuit Theory Appl.

Microprocess. Microsystems

J. Circuits Syst. Comput.

Publications

Sudhanshu Janwadkar, Rasika Dhavse
ASIC design of power and area efficient programmable FIR filter using optimized Urdhva-Tiryagbhyam Multiplier for impedance cardiography. Microprocess. Microsystems 107 (2024)
Sudhanshu Janwadkar, Rasika Dhavse
ASIC implementation of ECG denoising FIR filter by using hybrid Vedic-Wallace tree multiplier. Int. J. Circuit Theory Appl. 52 (4) (2024)
Sudhanshu Janwadkar, Rasika Dhavse
Investigation and Analysis of Power Performance Area (PPA) Cards of Digital Multiplier Architectures. J. Circuits Syst. Comput. 31 (13) (2022)
Sudhanshu Janwadkar, Rasika Dhavse
Implementation and Performance Evaluation of Novel Line Adder Architecture for Portable Systems : A Vedic Mathematics Approach. TENCON (2020)
Prafulla Galphade, Rasika Dhavse
Modeling Study of Impact of Surface Roughness on Flicker Noise in MOSFET. ISVLSI (2011)
Nilesh Shah, Rasika Dhavse, Anand D. Darji
Reading a 4-Bit SLC NAND Flash Memory in 180nm Technology. ICT (2010)