Parimal Patel

Publication Activity (10 Years)

Years Active: 1992-2008
Publications (10 Years): 0

Publications

Chirag Parikh, Parimal Patel
Selection and Implementation of an EAP Authentication Protocol for Hand-held Devices. CAINE (2008)
Parimal Patel
Tutorial IND2A: Embedded Systems Design with Xilinx Virtex-5 Series FPGA. VLSI Design (2007)
Parimal Patel, Ashok Kumar Tummala
Detecting TCP Port Scans Generated by NMAP using Reconfigurable Hardware. CATA (2007)
Parimal Patel, Chirag Parikh
Low Power Implementation of AES (RIJNDAEL) Algorithm. CATA (2007)
Christopher J. Martinez, Wei-Ming Lin, Parimal Patel
Optimal XOR hashing for non-uniformly distributed address lookup in computer networks. J. Netw. Comput. Appl. 30 (4) (2007)
Sunil K. Venugopal, Chirag Parikh, Parimal Patel
Implementation of an IEEE 802.11i based Wireless Security System. HPCNCS (2007)
Ashok Kumar Tummala, Parimal Patel
Distributed IDS using Reconfigurable Hardware. IPDPS (2007)
Parimal Patel
Embedded Systems Design Using FPGA. VLSI Design (2006)
Devang Pandya, Christopher J. Martinez, Wei-Ming Lin, Parimal Patel
The Design of Efficient Hashing Techniques for IP Address Lookup. LCN (2006)
Devang Pandya, Christopher J. Martinez, Wei-Ming Lin, Parimal Patel
Advanced hashing techniques for non-uniformly distributed IP address lookup. Communications and Computer Networks (2006)
Parimal Patel, Chirag Parikh
IDEA cryptographic processor in FPGA. J. Comput. Methods Sci. Eng. 5 (4) (2005)
Parimal Patel, Ashok Kumar Tummala, Hari Babu Ramineni, Wei-Ming Lin
Improved Design and Implementation of Network Intrusion Detection System for Gigabit Network Traffic Using FPGA. CAINE (2005)
Bala Krishnan D. Achie, Ajaykrishna Sreehari, Parimal Patel
FPGA Based Implementation of MD5 Message-Digest Algorithm for IPSEC Authentication. CAINE (2005)
Christopher J. Martinez, Wei-Ming Lin, Parimal Patel
Optimal XOR hashing for a linearly distributed address lookup in computer networks. ANCS (2005)
Chirag Parikh, Parimal Patel
Design and Implementation of AES (Rijndael) Algorithm. CAINE (2004)
Sumit N. Vora, Parimal Patel
Architecture for Context-driven Packet Payload Processing Engine. CAINE (2004)
Apurva Mistry, Parimal Patel
Prototyped Embedded Application for IGMP Version 2 Protocol. CAINE (2004)
Narayanam Ranganadh, Parimal Patel, Artyom M. Grigoryan
Implementation of the DFT Using Radix-2 and Paired Transform Algorithms. CAINE (2004)
Wei-Ming Lin, Ramu Madhavaram, Parimal Patel, Fred Hudson
A Real-Time Ad Hoc Packet Matching Technique for Hardware-Based Network Intrusion Detection Systems. CATA (2004)
Parimal Patel, Venkataramana Reddipalli
Design Considerations of Implementing a Superscalar CPU in FPGA. CATA (2003)
Parimal Patel, Chirag Parikh
An Efficient Design and Implementation of DES and Triple-DES Algorithms. CATA (2003)
Parimal Patel, Chirag Parikh
Design and Implementation of AES (Rijndael) Algorithm. CAINE (2003)
Venkataramana Reddipalli, Sri Pallavi Padala, Parimal Patel
Design and Implementation of ATM NIC in FPGA. CAINE (2002)
Parimal Patel, Harish Maiya
Implementation comparison of multicasting policies in an ATM switch. CATA (2001)
Parimal Patel, Venkataramana Reddipalli
Implementation of write relocatable coherency protocol in multiple processor architectures. CATA (2001)
Parimal Patel, Chung Chang
Performance improvement using fill unit. CATA (1999)
Parimal Patel, Saad Zahid
Design Considerations in an ATM Switch Design. ICCCN (1998)
Parimal Patel, Hemal N. Kothari, James F. Robb
Development of an ASIC set for signal processing. IEEE Micro 12 (6) (1992)