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N. P. N. S. Chandana
Publication Activity (10 Years)
Years Active: 2022-2022
Publications (10 Years): 1
Top Topics
High Power
Signal Processor
Logic Circuits
Delay Insensitive
Top Venues
Wirel. Pers. Commun.
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Publications
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K. Praghash
,
S. Arun Metha
,
B. Sai Tanuja
,
K. Preethi
,
N. P. N. S. Chandana
Implementation and Investigation of an Optimal Full Adder Design for Low Power and Reduced Delay Conditions.
Wirel. Pers. Commun.
126 (4) (2022)