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Lanlan Cui
ORCID
Publication Activity (10 Years)
Years Active: 2019-2022
Publications (10 Years): 4
Top Topics
Ldpc Codes
Flash Memory
Bit Errors
Optimization Scheme
Top Venues
ICCD
ACM Trans. Design Autom. Electr. Syst.
DATE
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
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Publications
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Lanlan Cui
,
Xiaojian Liu
,
Fei Wu
,
Zhonghai Lu
,
Changsheng Xie
A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
41 (6) (2022)
Lanlan Cui
,
Fei Wu
,
Xiaojian Liu
,
Meng Zhang
,
Renzhi Xiao
,
Changsheng Xie
Improving LDPC Decoding Performance for 3D TLC NAND Flash by LLR Optimization Scheme for Hard and Soft Decision.
ACM Trans. Design Autom. Electr. Syst.
27 (1) (2022)
Meng Zhang
,
Fei Wu
,
Qin Yu
,
Weihua Liu
,
Lanlan Cui
,
Yahui Zhao
,
Changsheng Xie
BeLDPC: Bit Errors Aware Adaptive Rate LDPC Codes for 3D TLC NAND Flash Memory.
DATE
(2020)
Lanlan Cui
,
Fei Wu
,
Xiaojian Liu
,
Meng Zhang
,
Changsheng Xie
VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash.
ICCD
(2019)