Kiyeon Lee

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 1

Top Topics

Top Venues

SIAM J. Math. Anal.

J. Parallel Distributed Comput.

Publications

Yonggeun Cho, Seokchang Hong, Kiyeon Lee
Scattering and Nonscattering of the Hartree-Type Nonlinear Dirac System at Critical Regularity. SIAM J. Math. Anal. 55 (4) (2023)
Kiyeon Lee, Sangyeun Cho
Accurately modeling superscalar processor performance with reduced trace. J. Parallel Distributed Comput. 73 (4) (2013)
Kiyeon Lee, Moo-Kyoung Chung, Soojung Ryu, Yeon-Gon Cho, Sangyeun Cho
Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors. ICCD (2012)
Kiyeon Lee, Sangyeun Cho
In-N-Out: Reproducing Out-of-Order Superscalar Processor Behavior from Reduced In-Order Traces. MASCOTS (2011)
Taecheol Oh, Kiyeon Lee, Sangyeun Cho
An Analytical Performance Model for Co-management of Last-Level Cache and Bandwidth Sharing. MASCOTS (2011)
Hyunjin Lee, Lei Jin, Kiyeon Lee, Socrates Demetriades, Michael Moeng, Sangyeun Cho
Two-phase trace-driven simulation (TPTS): a fast multicore processor architecture simulation approach. Softw. Pract. Exp. 40 (3) (2010)
Kiyeon Lee, Shayne Evans, Sangyeun Cho
Accurately approximating superscalar processor performance from traces. ISPASS (2009)
Taecheol Oh, Hyunjin Lee, Kiyeon Lee, Sangyeun Cho
An Analytical Model to Study Optimal Area Breakdown between Cores and Caches in a Chip Multiprocessor. ISVLSI (2009)
Sangyeun Cho, Socrates Demetriades, Shayne Evans, Lei Jin, Hyunjin Lee, Kiyeon Lee, Michael Moeng
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation. ICPP (2008)
Sangyeun Cho, Lei Jin, Kiyeon Lee
Achieving Predictable Performance with On-Chip Shared L2 Caches for Manycore-Based Real-Time Systems. RTCSA (2007)