Khalid Javeed

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 19

Top Topics

Intrusion Detection

Fpga Implementation

Top Venues

Int. J. Circuit Theory Appl.

Microprocess. Microsystems

Publications

Yasir Ali Shah, Ciara Rafferty, Ayesha Khalid, Safiullah Khan, Khalid Javeed, Máire O'Neill
Efficient Soft Core Multiplier for Post Quantum Digital Signatures. ISCAS (2024)
Khalid Javeed, Ali El-Moursy, David Gregg
CSM: efficient FPGA implementation of elliptic curve scalar multiplication over generic prime field GF(p). J. Supercomput. 80 (1) (2024)
Adil Hussain, Kashif Naseer Qureshi, Khalid Javeed, Musaed Alhussein
An Enhanced Intelligent Intrusion Detection System to Secure E-Commerce Communication Systems. Comput. Syst. Sci. Eng. 47 (2) (2023)
Khalid Javeed, Ali El-Moursy, David Gregg
EC-Crypto: Highly Efficient Area-Delay Optimized Elliptic Curve Cryptography Processor. IEEE Access 11 (2023)
Abeer Iftikhar, Kashif Naseer Qureshi, Ali A. Altalbe, Khalid Javeed
Security Provision by Using Detection and Prevention Methods to Ensure Trust in Edge-Based Smart City Networks. IEEE Access 11 (2023)
Khalid Javeed, Ali El-Moursy
Area-time efficient point multiplication architecture on twisted Edwards curve over general prime field G F ( p ). Int. J. Circuit Theory Appl. 51 (12) (2023)
Khalid Javeed
FPGA Implementation of Area-Time Aware ECC Scalar Multiplication Core. ICECS (2023)
Khalid Javeed, Kamran Saeed, David Gregg
High-speed parallel reconfigurable Fp multipliers for elliptic curve cryptography applications. Int. J. Circuit Theory Appl. 50 (4) (2022)
Yasir Ali Shah, Khalid Javeed, Muhammad Imran Shehzad, Shoaib Azmat
LUT-based high-speed point multiplier for Goldilocks-Curve448. IET Comput. Digit. Tech. 14 (4) (2020)
Yasir Ali Shah, Khalid Javeed, Shoaib Azmat, Xiaojun Wang
Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor. J. Circuits Syst. Comput. 28 (5) (2019)
Zeeshan Haider, Khalid Javeed, Mei Song, Xiaojun Wang
A Low-Cost Self-Test Architecture Integrated With PRESENT Cipher Core. IEEE Access 7 (2019)
Yasir Ali Shah, Khalid Javeed, Shoaib Azmat, Xiaojun Wang
A high-speed RSD-based flexible ECC processor for arbitrary curves over general prime field. Int. J. Circuit Theory Appl. 46 (10) (2018)
Safiullah Khan, Khalid Javeed, Yasir Ali Shah
High-speed FPGA implementation of full-word Montgomery multiplier for ECC applications. Microprocess. Microsystems 62 (2018)
Khalid Javeed, Xiaojun Wang, Mike Scott
High performance hardware support for elliptic curve cryptography over general prime field. Microprocess. Microsystems 51 (2017)
Khalid Javeed, Xiaojun Wang
). Int. J. Circuit Theory Appl. 45 (2) (2017)
Khalid Javeed, Xiaojun Wang
Speed and Area Optimized Parallel Higher-Radix Modular Multipliers. IACR Cryptol. ePrint Arch. 2016 (2016)
Khalid Javeed, Xiaojun Wang
FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture. Int. J. Reconfigurable Comput. 2016 (2016)
Khalid Javeed, Daniel Irwin, Xiaojun Wang
Design and Performance Comparison of Modular Multipliers Implemented on FPGA Platform. ICCCS (1) (2016)
Khalid Javeed, Xiaojun Wang, Mike Scott
Serial and parallel interleaved modular multipliers on FPGA platform. FPL (2015)
Khalid Javeed, Xiaojun Wang
Radix-4 and radix-8 booth encoded interleaved modular multipliers over general Fp. FPL (2014)
Khalid Javeed, Xiaojun Wang
Efficient montgomery multiplier for pairing and elliptic curve based cryptography. CSNDSP (2014)