K. S. Raghunathan

Publication Activity (10 Years)

Years Active: 1982-1993
Publications (10 Years): 0

Publications

B. Naveen, K. S. Raghunathan
An Automatic Netlist-to-Schematic Generator. IEEE Des. Test Comput. 10 (1) (1993)
P. Marimuthu, K. S. Raghunathan
BEST: Bond Editor and Test Vector Translator. VLSI Design (1993)
Suhail Ahmed, T. V. Nagesh, Ramoji Rao, B. Naveen, P. K. Fangaria, K. S. Raghunathan
FLOR: A Hierarchical Floorplanner Under Vinyas VCX System - System Overview. VLSI Design (1993)
B. Naveen, A. Savargaonkar, K. S. Raghunathan
N2S: An Automatic Netlist to Schematic generator. VLSI Design (1992)
K. R. Rao, K. S. Raghunathan
Constrained Via Minimisation In Greedy Channel Routing. VLSI Design (1992)
K. S. Raghunathan, J. A. Barchanski, Gregor von Bochmann
Relationship between performance parameters for transport and network services. SIGCOMM (1983)
Gregor von Bochmann, Eduard Cerny, Michel Gagné, Claude Jard, Alain Léveillé, Clement Lacaille, Michel Maksud, K. S. Raghunathan, Behçet Sarikaya
Experience with Formal Specifications Using an Extended State Transition Model. IEEE Trans. Commun. 30 (12) (1982)
Gregor von Bochmann, Eduard Cerny, Michel Gagné, Claude Jard, Alain Léveillé, Clement Lacaille, Michel Maksud, K. S. Raghunathan, Behçet Sarikaya
Some Experience with the Use of Formal Specifications. PSTV (1982)