K. S. Gurumurthy

Publication Activity (10 Years)

Years Active: 2003-2013
Publications (10 Years): 0

Top Topics

Pedestrian Dynamics

Top Venues

Publications

Prashant V. Joshi, N. Prameela Kumari, K. S. Gurumurthy
Instruction Level Power Analysis for Low Power VLSI Applications. ICETET (2013)
N. Prameela Kumari, Prashant V. Joshi, K. S. Gurumurthy
Realization of Basic Gates Using Universal Logic Blocks in Quantum Dot Cellular Automata. ICETET (2013)
R. Jayagowri, K. S. Gurumurthy
Implementation of Gating Technique with Modified Scan Flip-Flop for Low Power Testing of VLSI Chips. VDAT (2012)
Geetishree Mishra, Rajeshwari Hegde, K. S. Gurumurthy
Deploying Health Monitoring ECU Towards Enhancing the Performance of In-Vehicle Network CoRR (2012)
K. S. Vasundara Patel, K. S. Gurumurthy
Design of High Performance Quaternary Adders. ISMVL (2011)
Suma S. A., K. S. Gurumurthy
Sub Band Speech Analysis Using Gammatone Filter Banks and Optimal Pitch Extraction Methods for Each Sub Band Using Average Magnitude Difference Function (AMDF) for LPC Speech Coders in Noisy Environments. J. Next Gener. Inf. Technol. 1 (2) (2010)
K. S. Vasundara Patel, K. S. Gurumurthy
Arithmetic Operations in Multi-Valued Logic CoRR (2010)
Suma S. A., K. S. Gurumurthy
New Improved Echo Canceller Based on Normalized LMS Adaptive Filter for Single Talk and Double Talk Detection, Subband Echo Cancellation, Acoustic Echo Cancellation. J. Next Gener. Inf. Technol. 1 (2) (2010)
K. S. Vasundara Patel, K. S. Gurumurthy
Moving From Binary Towards Multi-valued logic. CDES (2009)
Rajeshwari Hegde, K. S. Gurumurthy
Load Balancing towards ECU Integration. ARTCom (2009)
Rajeshwari Hegde, K. S. Gurumurthy
Load Balancing in Multi ECU Configuration. ARTCom (2009)
R. Manjunath, K. S. Gurumurthy
Artificial neural networks as building blocks of mixed signal FPGA. FPT (2003)