Józef Kulisz

Publication Activity (10 Years)

Years Active: 2005-2019
Publications (10 Years): 2

Top Topics

Programmable Logic

Top Venues

Microprocess. Microsystems

Publications

Marcin Kubica, Dariusz Kania, Józef Kulisz
A Technology Mapping of FSMs Based on a Graph of Excitations and Outputs. IEEE Access 7 (2019)
Miroslaw Chmiel, Józef Kulisz, Robert Czerwinski, A. Krzyzyk, Marcin Rosol, Patryk Smolarek
An IEC 61131-3-based PLC implemented by means of an FPGA. Microprocess. Microsystems 44 (2016)
Józef Kulisz, Jerzy Mikucki
An IP-Core Generator for Circuits Performing Arithmetic Multiplication. PDeS (2013)
Józef Kulisz, Miroslaw Chmiel, Andrzej Malcher
Generating Time Intervals in Programmable Logic Controllers. PDeS (2013)
Józef Kulisz, Robert Czerwinski, Jan Mocha, Miroslaw Chmiel
A PC-based object simulator for supporting PLC software development. PDeS (2010)
Robert Czerwinski, Józef Kulisz
State machine description oriented towards effective usage of vendor-independent synthesis tools. PDeS (2009)
Dariusz Kania, Józef Kulisz
Logic synthesis for PAL-based CPLD-s based on two-stage decomposition. J. Syst. Softw. 80 (7) (2007)
Dariusz Kania, Józef Kulisz, Adam Milik
A Novel Method of Two-Stage Decomposition Dedicated for PAL-based CPLDs. DSD (2005)
Dariusz Kania, Adam Milik, Józef Kulisz
Decomposition of Multi-Output Functions for CPLDs. DSD (2005)