Joseph Rabinowicz

Publication Activity (10 Years)

Years Active: 2014-2015
Publications (10 Years): 0

Top Topics

Formal Verification

Multiresolution

Statistical Analysis

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Shlomo Greenberg, Joseph Rabinowicz, Erez Manor
Selective State Retention Power Gating Based on Formal Verification. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2015)
Shlomo Greenberg, Joseph Rabinowicz, Ron Tsechanski, Eugene Paperno
Selective State Retention Power Gating Based on Gate-Level Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2014)