Jorma Skyttä

Publication Activity (10 Years)

Years Active: 1982-2015
Publications (10 Years): 1

Top Topics

Artificial Neural Networks

Top Venues

Publications

Hannu Heusala, Jorma Skyttä
How small and still effective a CMOS-SoC could ever be? NORCAS (2015)
Kimmo U. Järvinen, Jorma Skyttä
Fast point multiplication on Koblitz curves: Parallelization method and implementations. Microprocess. Microsystems 33 (2) (2009)
Kimmo U. Järvinen, Jorma Skyttä
On Parallelization of High-Speed Processors for Elliptic Curve Cryptography. IEEE Trans. Very Large Scale Integr. Syst. 16 (9) (2008)
Kimmo U. Järvinen, Juha Forsten, Jorma Skyttä
FPGA Design of Self-certified Signature Verification on Koblitz Curves. CHES (2007)
Kimmo Järvinen, Juha Forsten, Jorma Skyttä
Efficient Circuitry for Computing τ-adic Non-Adjacent Form. ICECS (2006)
Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities. ERSA (2005)
Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
Hardware Implementation Analysis of the MD5 Hash Algorithm. HICSS (2005)
Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A VHDL Generator for Elliptic Curve Cryptography. FPL (2004)
Kimmo Järvinen, Matti Tommiska, Jorma Skyttä
A scalable architecture for elliptic curve point multiplication. FPT (2004)
Antti Hämäläinen, Matti Tommiska, Jorma Skyttä
FPGA-Based Implementation of a 59-Neuron Feedforward Neural Network with a 17.1 Gbps Interlayer Throughput. IC-AI (2004)
Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A fully pipelined memoryless 17.8 Gbps AES-128 encryptor. FPGA (2003)
Antti Hämäläinen, Matti Tommiska, Jorma Skyttä
8 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm. FPL (2002)
Mika Loukola, Jorma Skyttä
Enhanced Augmented IP Routing Protocol (EAIRP) in IPv6 Environment. Electron. Commer. Res. 1 (4) (2001)
Matti Tommiska, Jorma Skyttä
Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware. FPL (2001)
Juha Forsten, Mika Loukola, Jorma Skyttä
Hardware Acceleration inside a Differentiated Services Access Node. IDMS (1999)
Mika Loukola, Jorma Skyttä
New Possibilities Offered by IPv6. ICCCN (1998)
Mika Loukola, Jorma Skyttä
Hop-by-hop option based flow-handling compared to other IP over ATM protocols. PICS (1998)
Mika Loukola, Jorma Skyttä
IPv6 over ATM flow-handling. Comput. Commun. 21 (13) (1998)
Jarkko Vuori, Jorma Skyttä
Implementation of a European paging system receiver using CORDIC algorithm. EUSIPCO (1996)
Jarkko Vuori, J. Honkanen, Jorma Skyttä
A new wireless paging network architecture. PIMRC (1994)
Jorma Skyttä, Tapio Takala
A Distributed Data Model for Raytracing. Advances in Computer Graphics Hardware (1988)
Jorma Skyttä, Tapio Takala
Partially Ordered Search Indices in the Organization of a Fixed Hierarchy. Advances in Computer Graphics Hardware (1987)
Iiro Hartimo, Klaus Kronlöf, Olli Simula, Jorma Skyttä
DFSP: A Data Flow Signal Processor. IEEE Trans. Computers 35 (1) (1986)
Jorma Skyttä, Tapio Takala
Utilization of VLSI for Creating an Active Data Base of 3-D Geometric Models. Advances in Computer Graphics Hardware (1986)
Klaus Kronlöf, Jorma Skyttä, Iiro Hartimo, Olli Simula
Performance of an experimental data flow architecture for signal processing. ICASSP (1982)