Jorge Castro-Godínez

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 17

Top Topics

Processing Units

Evolutionary Artificial Neural Networks

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Mohammad Javad Askarizadeh, Ebrahim Farahmand, Jorge Castro-Godínez, Ali Mahani, Laura Cabrera-Quiros, Carlos Salazar-Garcia
Exploring DNN Robustness Against Adversarial Attacks Using Approximate Multipliers. CoRR (2024)
Prattay Chowdhury, Jorge Castro-Godínez, Benjamin Carrion Schafer
Approximating HW Accelerators through Partial Extractions onto Shared Artificial Neural Networks. ASP-DAC (2023)
Jorge Castro-Godínez, Muhammad Abdullah Hanif, Muhammad Shafique
Cross-Layer Approximations for System-Level Optimizations: Challenges and Opportunities. DSN-W (2023)
Luis G. León-Vega, Eduardo Salazar-Villalobos, Alejandro Rodriguez-Figueroa, Jorge Castro-Godínez
Automatic Generation of Resource and Accuracy Configurable Processing Elements. ACM Trans. Embed. Comput. Syst. 22 (4) (2023)
Luis G. León-Vega, Jorge Castro-Godínez
Generic Accuracy Configurable Matrix Multiplication-Addition Accelerator using HLS. DSN-W (2023)
Brunno A. Abreu, Guilherme Paim, Jorge Castro-Godínez, Mateus Grellert, Sergio Bampi
On the Netlist Gate-level Pruning for Tree-based Machine Learning Accelerators. LASCAS (2022)
Morgana Macedo Azevedo sa Rosa, Guilherme Paim, Jorge Castro-Godínez, Eduardo A. C. da Costa, Rafael Iankowski Soares, Sergio Bampi
AxRSU: Approximate Radix-4 Squarer Unit. ISCAS (2022)
Tanfer Alan, Jorge Castro-Godínez, Jörg Henkel
Multiple approximate instances in neural processing units for energy-efficient circuit synthesis: work-in-progress. CASES (2021)
Nadir Khan, Jorge Castro-Godínez, Shixiang Xue, Jörg Henkel, Jürgen Becker
Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores. IEEE Trans. Very Large Scale Integr. Syst. 29 (1) (2021)
Jeferson González-Gómez, Steven Ávila-Ardón, Jonathan Rojas-González, Andres Stephen-Cantillano, Jorge Castro-Godínez, Carlos Salazar-García, Muhammad Shafique, Jörg Henkel
TailoredCore: Generating Application-Specific RISC-V-based Cores. LASCAS (2021)
Jorge Castro-Godínez, Humberto Barrantes-García, Muhammad Shafique, Jörg Henkel
AxLS: A Framework for Approximate Logic Synthesis Based on Netlist Transformations. IEEE Trans. Circuits Syst. II Express Briefs 68 (8) (2021)
Jorge Castro-Godínez, Deykel Hernández-Araya, Muhammad Shafique, Jörg Henkel
Approximate Acceleration for CNN-based Applications on IoT Edge Devices. LASCAS (2020)
Deykel Hernández-Araya, Jorge Castro-Godínez, Muhammad Shafique, Jörg Henkel
AUGER: A Tool for Generating Approximate Arithmetic Circuits. LASCAS (2020)
Jorge Castro-Godínez, Muhammad Shafique, Jörg Henkel
Towards Quality-Driven Approximate Software Generation for Accurate Hardware: Work-in-Progress. CASES (2020)
Jorge Castro-Godínez, Julián Mateus-Vargas, Muhammad Shafique, Jörg Henkel
AxHLS: Design Space Exploration and High-Level Synthesis of Approximate Accelerators using Approximate Functional Units and Analytical Models. ICCAD (2020)
Jorge Castro-Godínez, Muhammad Shafique, Jörg Henkel
ECAx: Balancing Error Correction Costs in Approximate Accelerators. ACM Trans. Embed. Comput. Syst. 18 (5s) (2019)
Jorge Castro-Godínez, Sven Esser, Muhammad Shafique, Santiago Pagani, Jörg Henkel
Compiler-driven error analysis for designing approximate accelerators. DATE (2018)