Jonathan Saul

Publication Activity (10 Years)

Years Active: 1991-2001
Publications (10 Years): 0

Publications

Alistair McEwan, Jonathan Saul
A High Speed Reconfigurable Firewall Based On Parameterizable FPGA-based Content Addressable Memories. J. Supercomput. 19 (1) (2001)
Jonathan Saul
Hardware/Software Codesign for FPGA-based Systems. HICSS (1999)
Alistair McEwan, Jonathan Saul, Andrew Bailey
A High Speed Reconfigurable Firewall Based on Parameterization FPGA-Based Content Addressable Memories. PDPTA (1999)
Maurice Kilavuka Inuani, Jonathan Saul
Re-synthesis in technology mapping for heterogeneous FPGAs. ICCD (1998)
Maurice Kilavuka Inuani, Jonathan Saul
Technology mapping of heterogeneous LUT-based FPGAs. FPL (1997)
Nigel Lester, Jonathan Saul
Logic Synthesis for FPGAs Using A Mixed Exclusive-/Inclusive-OR Form. FPL (1996)
Tomasz Kozlowski, Erik L. Dagless, Jonathan Saul
An enhanced algorithm for the minimization of exclusive-OR sum-of-products for incompletely specified functions. ICCD (1995)
Krzysztof Bilinski, Erik L. Dagless, Jonathan Saul, Janusz Szajna
An efficient verification algorithm for parallel controllers. EURO-DAC (1994)
Aiguo Lu, Jonathan Saul, Erik L. Dagless
Architecture Oriented Logic Optimization for Lookup Table Based FPGAs. ICCD (1994)
James Pardey, Tomasz Kozlowski, Jonathan Saul, Martin Bolton
State Assignment Algorithms for Parallel Controller Synthesis. ICCD (1992)
Jonathan Saul
An Algorithm for the Multi-Level Minimazation of Reed-Muller Rpresentations. ICCD (1991)