Jofre Pallares

Publication Activity (10 Years)

Years Active: 2003-2018
Publications (10 Years): 2

Top Topics

Integrated Circuit

Conceptual Schema

Top Venues

J. Hardw. Syst. Secur.

Publications

Raul Quijada, Roger Dura, Jofre Pallares, Xavier Formatje, Salvador Hidalgo, Francisco Serra-Graells
Large-Area Automated Layout Extraction Methodology for Full-IC Reverse Engineering. J. Hardw. Syst. Secur. 2 (4) (2018)
Jofre Pallares, Keith Sabine, Lluís Terés, Francisco Serra-Graells
An academic EDA suite for the full-custom design of mixed-mode integrated circuits. ISCAS (2017)
Stepan Sutula, Francesc Vila, Jofre Pallares, Keith Sabine, Lluís Terés, Francisco Serra-Graells
Teaching mixed-mode full-custom VLSI design with gaf, SpiceOpus and Glade. EWME (2014)
Xavier Redondo, Jofre Pallares, Francisco Serra-Graells
A 1.2V 130µA 10-bit MOS-Only Log-Domain Sigma Delta Modulator. ISCAS (2007)
Jofre Pallares, Justo Sabadell, Francisco Serra-Graells
Modeling all-MOS log filters and its application to Sigma-Delta modulators. ISCAS (1) (2003)