Ichiang Lin

Publication Activity (10 Years)

Years Active: 1989-2002
Publications (10 Years): 0

Publications

Ichiang Lin, Chien-In Henry Chen
Timing Challenges for Very Deep Sub-Micron (VDSM) IC. VLSI Design 2002 (3) (2002)
Kumar Venkat, Liang Chen, Ichiang Lin, Piyush Mistry, Pravin Madhani
Timing verification of dynamic circuits. IEEE J. Solid State Circuits 31 (3) (1996)
David Hung-Chang Du, Ichiang Lin, K. C. Chang
On Wafer-Packing Problems. IEEE Trans. Computers 42 (11) (1993)
Ichiang Lin, John A. Ludwig, Kwok Eng
Analyzing Cycle Stealing on Synchronous Circuits with Level-Sensitive Latches. DAC (1992)
Ichiang Lin, David Hung-Chang Du
Performance-Driven Constructive Placement. DAC (1990)
Ichiang Lin, David Hung-Chang Du, Steve H.-C. Yen
Gate Matrix Layout Synthesis with Two-Dimensional Folding. DAC (1989)