C
search
search
reviewers
reviewers
feeds
feeds
assignments
assignments
settings
logout
Hiromu Miyazaki
Publication Activity (10 Years)
Years Active: 2019-2020
Publications (10 Years): 6
Top Topics
Instruction Set
Xilinx Virtex
Application Specific
Floating Point
Top Venues
CoRR
IEICE Trans. Inf. Syst.
HEART
</>
Publications
</>
Hiromu Miyazaki
,
Takuto Kanamori
,
Md. Ashraful Islam
,
Kenji Kise
RVCoreP: An Optimized RISC-V Soft Processor of Five-Stage Pipelining.
IEICE Trans. Inf. Syst.
(12) (2020)
Takuto Kanamori
,
Hiromu Miyazaki
,
Kenji Kise
RVCoreP-32IC: A high-performance RISC-V soft processor with an efficient fetch unit supporting the compressed instructions.
CoRR
(2020)
Junya Miura
,
Hiromu Miyazaki
,
Kenji Kise
A portable and Linux capable RISC-V computer system in Verilog HDL.
CoRR
(2020)
Hiromu Miyazaki
,
Takuto Kanamori
,
Md. Ashraful Islam
,
Kenji Kise
RVCoreP : An optimized RISC-V soft processor of five-stage pipelining.
CoRR
(2020)
Md. Ashraful Islam
,
Hiromu Miyazaki
,
Kenji Kise
RVCoreP-32IM: An effective architecture to implement mul/div instructions for five stage RISC-V soft processors.
CoRR
(2020)
Hiromu Miyazaki
,
Junya Miura
,
Kenji Kise
An Efficient Instruction Fetch Architecture for a RISC-V Soft Processor on an FPGA.
HEART
(2019)