Ganesan Umanesan

Publication Activity (10 Years)

Years Active: 2000-2022
Publications (10 Years): 5

Top Topics

Top Venues

Parallel Comput.

Publications

Steven Wei Der Chien, Artur Podobas, Martin Svedin, Andriy Tkachuk, Salem El Sayed, Pawel Andrzej Herman, Ganesan Umanesan, Sai Narasimhamurthy, Stefano Markidis
NoaSci: A Numerical Object Array Library for I/O of Scientific Applications on Object Storage. PDP (2022)
Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Stefano Markidis, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Dirk Pleiter, Shaun De Witt
SAGE: Percipient Storage for Exascale Data Centric Computing. Parallel Comput. 83 (2019)
Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Steven Wei Der Chien, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Shaun De Witt, Dirk Pleiter, Stefano Markidis
The SAGE Project: a Storage Centric Approach for Exascale Computing. CoRR (2018)
Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Steven Wei Der Chien, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Shaun De Witt, Dirk Pleiter, Stefano Markidis
The SAGE project: a storage centric approach for exascale computing: invited paper. CF (2018)
Sai Narasimhamurthy, Nikita Danilov, Sining Wu, Ganesan Umanesan, Stefano Markidis, Sergio Rivas-Gomez, Ivy Bo Peng, Erwin Laure, Dirk Pleiter, Shaun De Witt
SAGE: Percipient Storage for Exascale Data Centric Computing. CoRR (2018)
Ganesan Umanesan, Eiji Fujiwara
Parallel Decoding Cyclic Burst Error Correcting Codes. IEEE Trans. Computers 54 (1) (2005)
Ganesan Umanesan, Eiji Fujiwara
A Class of Codes for Correcting Single Spotty Byte Errors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (3) (2003)
Ganesan Umanesan, Eiji Fujiwara
A Class of Random Multiple Bits in a Byte Error Correcting and Single Byte Error Detecting (S_t/b EC-S_bED) Codes. IEEE Trans. Computers 52 (7) (2003)
Ganesan Umanesan, Eiji Fujiwara
Single Byte Error Correcting Codes with Double Bit within a Block Error Correcting Capability for Memory Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2002)
Ganesan Umanesan, Eiji Fujiwara
EC) Codes for Memory Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2002)
Ganesan Umanesan, Eiji Fujiwara
Adjacent Double Bit Error Correcting Codes with Single Byte Error Detecting Capability for Memory Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2002)
Ganesan Umanesan, Eiji Fujiwara
A Class of Random Multiple Bits in a Byte Error Correcting (S t/b EC)Codes for Semiconductor Memory Systems. PRDC (2002)
Ganesan Umanesan, Eiji Fujiwara
A class of systematic t/B-error correcting codes for semiconductor memory systems. ITW (2001)
Ganesan Umanesan, Eiji Fujiwara
Single Byte Error Control Codes with Double Bit within a Block Error Correcting Capability for Semiconductor Memory Systems. DFT (2000)