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G. Naveen Balaji
ORCID
Publication Activity (10 Years)
Years Active: 2019-2019
Publications (10 Years): 1
Top Topics
Low Power
Gate Array
Circuit Design
Top Venues
Clust. Comput.
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Publications
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G. Naveen Balaji
,
S. Chenthur Pandian
Design of test pattern generator (TPG) by an optimized low power design for testability (DFT) for scan BIST circuits using transmission gates.
Clust. Comput.
22 (6) (2019)