Dominik Auras

Publication Activity (10 Years)

Years Active: 2009-2022
Publications (10 Years): 6

Top Topics

Matrix Inversion

Vlsi Architecture

Top Venues

ACM Great Lakes Symposium on VLSI

VLSI-SoC (Selected Papers)

Publications

Sebastian Birke, Bjoern Hartmann, Dominik Auras, Markus Wloka, Gerd Ascheid, Rainer Leupers
Design and Exploration of an ARC-Coprocessor for LSTM Based Audio Applications. NorCAS (2022)
Sebastian Birke, Dominik Auras, Tobias Piwczyk, Robin Mahlke, Nikolas Alberti, Rainer Leupers, Gerd Ascheid
VLSI Architectures for ORVD Trellis based MIMO Detection. ICNC (2019)
Dominik Auras, Sebastian Birke, Rainer Leupers, Gerd Ascheid
Reducing the Computational Complexity of ORVD-Trellis Search Based MIMO Detection. ICNC (2018)
Sebastian Birke, Wei-Jhe Chen, Gaojian Wang, Dominik Auras, Chung-An Shen, Rainer Leupers, Gerd Ascheid
VLSI implementation of channel estimation for millimeter wave beamforming training. LASCAS (2018)
Dominik Auras, Sebastian Birke, Tobias Piwczyk, Rainer Leupers, Gerd Ascheid
A flexible MCMC detector ASIC. ISOCC (2016)
Dominik Auras, Rainer Leupers, Gerd Ascheid
ORVD-Trellis based MIMO detection. NEWCAS (2016)
Dominik Auras, Rainer Leupers, Gerd H. Ascheid
A novel reduced-complexity soft-input soft-output MMSE MIMO detector: Algorithm and efficient VLSI architecture. ICC (2014)
Dominik Auras, Uwe Deidersen, Rainer Leupers, Gerd Ascheid
VLSI design of a parallel MCMC-based MIMO detector with multiplier-free Gibbs samplers. VLSI-SoC (2014)
Dominik Auras, Uwe Deidersen, Rainer Leupers, Gerd Ascheid
A Parallel MCMC-Based MIMO Detector: VLSI Design and Algorithm. VLSI-SoC (Selected Papers) (2014)
Dominik Auras, Rainer Leupers, Gerd Ascheid
A Novel Class of Linear MIMO Detectors with Boosted Communications Performance: Algorithm and VLSI Architecture. ISVLSI (2014)
Dominik Auras, Dominik Rieth, Rainer Leupers, Gerd Ascheid
VLSI implementation of linear MIMO detection with boosted communications performance: extended abstract. ACM Great Lakes Symposium on VLSI (2014)
Dominik Auras, Rainer Leupers, Gerd Ascheid
Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors. ISCAS (2014)
Uwe Deidersen, Dominik Auras, Gerd Ascheid
A parallel VLSI architecture for Markov chain Monte Carlo based MIMO detection. ACM Great Lakes Symposium on VLSI (2013)
Andreas Minwegen, Dominik Auras, Gerd Ascheid
A Flexible ASIC for Time-Domain Decision-Directed Channel Estimation in MIMO-OFDM Systems. VLSI-SoC (Selected Papers) (2013)
Stefan Schürmans, Diandian Zhang, Dominik Auras, Rainer Leupers, Gerd Ascheid, Xiaotao Chen, Lun Wang
Creation of ESL power models for communication architectures using automatic calibration. DAC (2013)
Andreas Minwegen, Dominik Auras, Uwe Deidersen, Gerd Ascheid
Architectures for MIMO-OFDM simplified decision directed channel estimation. ISCAS (2012)
Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems. ICSAMOS (2012)
Dominik Auras, Andreas Minwegen, Uwe Deidersen
Just-in-Time Verification in ADL-based processor design. ICSAMOS (2012)
Andreas Minwegen, Dominik Auras, Gerd Ascheid
A multimode decision-directed channel estimation ASIC for MIMO-OFDM. VLSI-SoC (2012)
Dominik Auras, Sylvain Girbal, Hugues Berry, Olivier Temam, Sami Yehia
CMA: Chip multi-accelerator. SASP (2010)
David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rudolf Mathar
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves. CHES (2009)
David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rainer Leupers, Rudolf Mathar, Heinrich Meyr
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves. IACR Cryptol. ePrint Arch. 2009 (2009)
Milan Zivkovic, Dominik Auras, Rudolf Mathar
Reconfigurable framework for adaptive OFDM transmission. WiNTECH@MOBICOM (2009)