Dimitrios Karayiannis

Publication Activity (10 Years)

Years Active: 1995-1999
Publications (10 Years): 0

Publications

Spyros Tragoudas, Dimitrios Karayiannis
A fast nonenumerative automatic test pattern generator for pathdelay faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (7) (1999)
Dimitrios Karayiannis, Spyros Tragoudas
Timing-Driven Circuit Implementation. VLSI Design 1998 (2) (1998)
Dimitrios Karayiannis, Spyros Tragoudas
Clustering Network Modules with Different Implementations for Delay Minimization. VLSI Design 1998 (1) (1998)
Dimitrios Karayiannis, Spyros Tragoudas
A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. VTS (1998)
Spyros Tragoudas, Dimitrios Karayiannis
Implementing and clustering modules with complex delays. Integr. 22 (1-2) (1997)
Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
Improved nonenumerative path-delay fault-coverage estimation based on optimal polynomial-time algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (3) (1997)
Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. ICCD (1997)
Dimitrios Karayiannis, Spyros Tragoudas
ATPD: An Automatic Test Pattern Generator for Path Delay Faults. ITC (1996)
Dimitrios Karayiannis, Spyros Tragoudas
Uniform area timing-driven circuit implementation. Great Lakes Symposium on VLSI (1995)