Daniel Thiele

Publication Activity (10 Years)

Years Active: 2012-2017
Publications (10 Years): 6

Top Topics

Graph Colouring

Formal Analysis

Top Venues

Publications

Henning Sahlbach, Daniel Thiele, Rolf Ernst
A system-level FPGA design methodology for video applications with weakly-programmable hardware components. J. Real Time Image Process. 13 (2) (2017)
Mischa Möstl, Daniel Thiele, Rolf Ernst
Invited - Towards fail-operational ethernet based in-vehicle networks. DAC (2016)
Daniel Thiele, Rolf Ernst
Formal analysis based evaluation of software defined networking for time-sensitive Ethernet. DATE (2016)
Daniel Thiele, Rolf Ernst
Formal worst-case performance analysis of time-sensitive Ethernet with frame preemption. ETFA (2016)
Daniel Thiele, Rolf Ernst
Formal worst-case timing analysis of Ethernet TSN's burst-limiting shaper. DATE (2016)
Daniel Thiele, Johannes Schlatow, Philip Axer, Rolf Ernst
Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networks. Real Time Syst. 52 (1) (2016)
Daniel Thiele, Rolf Ernst, Jonas Diemer
Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers. VNC (2015)
Daniel Thiele, Philip Axer, Rolf Ernst
Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling. DAC (2015)
Philip Axer, Daniel Thiele, Rolf Ernst
Formal timing analysis of automatic repeat request for switched real-time networks. SIES (2014)
Philip Axer, Daniel Thiele, Rolf Ernst, Jonas Diemer
Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks. DAC (2014)
Daniel Thiele, Philip Axer, Rolf Ernst, Jan R. Seyler
Improving formal timing analysis of switched ethernet by exploiting traffic stream correlations. CODES+ISSS (2014)
Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Jan R. Seyler
Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet. CODES+ISSS (2013)
Jonas Diemer, Daniel Thiele, Rolf Ernst
Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching. SIES (2012)
Daniel Thiele, Rolf Ernst
Optimizing performance analysis for synchronous dataflow graphs with shared resources. DATE (2012)