Cyril Prasanna Raj

Publication Activity (10 Years)

Years Active: 2009-2020
Publications (10 Years): 3

Top Topics

Parallel Processing

Polynomial Neural Networks

Top Venues

Int. J. Image Graph.

Int. J. Wavelets Multiresolution Inf. Process.

Publications

S. S. Divakara, Sudarshan Patilkulkarni, Cyril Prasanna Raj
Novel DWT/IDWT Architecture for 3D with Nine Stage 2D Parallel Processing using Split Distributed Arithmetic. Int. J. Image Graph. 20 (3) (2020)
S. S. Divakara, Sudarshan Patilkulkarni, Cyril Prasanna Raj
High Speed Area Optimized Hybrid DA Architecture for 2D-DTCWT. Int. J. Image Graph. 18 (1) (2018)
S. S. Divakara, Sudarshan Patilkulkarni, Cyril Prasanna Raj
High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA. Int. J. Wavelets Multiresolution Inf. Process. 15 (5) (2017)
K. V. Venkata Ramanaiah, Cyril Prasanna Raj
VLSI Architecuture for Neural Network Based Image Compression. ICETET (2010)
A. Ravi Kumar, Cyril Prasanna Raj, G. M. Sree Rama Reddy
Design and Verification of Cache Memory Decoder for High Speed Multicore Processor. ICETET (2010)
Y. N. Santhosh, Namita Palacha, Cyril Prasanna Raj
Design and VLSI Implementation of Interpolators/Decimators for DUC/DDC. ICETET (2010)
B. M. Sunil, Cyril Prasanna Raj
Analysis of Wavelet for 3D-DWT Volumetric Image Compression. ICETET (2010)
M. B. Veena, Cyril Prasanna Raj, M. N. Shanmukha Swamy
FPGA Based Reconfigurable 200 MHz Transmitter and Receiver Front End for MIMO-OFDM. ICETET (2010)
Pachara V. Rao, Cyril Prasanna Raj, S. Ravi
VLSI Design and Analysis of Multipliers for Low Power. IIH-MSP (2009)