Chris Bailey

Publication Activity (10 Years)

Years Active: 2000-2018
Publications (10 Years): 1

Top Topics

Computer Architecture

Top Venues

J. Sens. Actuator Networks

Publications

Amir Mansoor Kamali Sarvestani, Chris Bailey, Jim Austin
Performance Analysis of a 3D Wireless Massively Parallel Computer. J. Sens. Actuator Networks 7 (2) (2018)
Michael Freeman, Chris Bailey
Re-evaluation of the role of the processor within embedded multiprocessor systems. IADIS AC (1) (2009)
Chris Bailey, Michael J. Freeman
A JAVA bread-board simulator digital circuit simulation with an extensible e-learning tool. IADIS AC (1) (2009)
Hongying Meng, Michael Freeman, Nick E. Pears, Chris Bailey
Real-time human action recognition on an embedded, reconfigurable video processing architecture. J. Real Time Image Process. 3 (3) (2008)
Nick E. Pears, Paul Wright, Chris Bailey
Practical single view metrology for cuboids. VISAPP (2) (2007)
Hongying Meng, Nick E. Pears, Chris Bailey
Motion information combination for fast human action recognition. VISAPP (2) (2007)
Hongying Meng, Nick E. Pears, Chris Bailey
A Human Action Recognition System for Embedded Computer Vision Application. CVPR (2007)
Hongying Meng, Nick E. Pears, Chris Bailey
Motion Feature Combination for Human Action Recognition in Video. VISIGRAPP (Selected Papers) (2007)
Hongying Meng, Nick E. Pears, Chris Bailey
Human Action Classification Using SVM_2K Classifier on Motion Features. MRCS (2006)
Chris Bailey, Huibin Shi
Instruction level parallelism of stack-code under varied issue widths, and one-level branch prediction. IADIS AC (2005)
Huibin Shi, Chris Bailey, Glenn Farrall, Neil Hastie, Sam Jenkins
Combined simulator statistics and block code sampling to study performance enhancement of microarchitecture. SoCC (2005)
Michael Freeman, Chris Bailey
Developing ubiquitous computing applications. IADIS AC (2005)
Soyeb Alli, Chris Bailey
A Mechanism for Implementing Precise Exceptions in Pipelined Processors. DSD (2004)
Chris Bailey
A Proposed Mechanism for Super-Pipelined Instruction-Issue for ILP Stack Machines. DSD (2004)
Huibin Shi, Chris Bailey
Investigating Available Instruction Level Parallelism for Stack Based Machine Architectures. DSD (2004)
Soyeb Alli, Chris Bailey
Compiler-Directed Dynamic Memory Disambiguation for Loop Structures. DSD (2004)
Chris Bailey
Achieving Minimal and Deterministic Interrupt Execution in Stack-Based Processor Architectures. EUROMICRO (2000)
Michael Weeks, Chris Bailey, Reza Sotudeh
Continuous Discrete-Event Simulation of a Continuous-Media Server I/O Subsystem. EUROMICRO (2000)