Chia-Lin Ho

Publication Activity (10 Years)

Years Active: 2002-2017
Publications (10 Years): 2

Top Topics

Design Principles

Hardware Implementation

Top Venues

Comput. Ind. Eng.

Publications

D. Daniel Sheu, Jealousy Hong, Chia-Lin Ho
New product identification and design through super-system trimming. Comput. Ind. Eng. 111 (2017)
Chi-Cheng Ju, Tsu-Ming Liu, Yung-Chang Chang, Chih-Ming Wang, Chia-Yun Cheng, Hue-Min Lin, Chun-Chia Chen, Min-Hao Chiu, Ping Chao, Ming-Long Wu, Meng-Jye Hu, Sheng-Jen Wang, Che-Hong Chen, Shun-Hsiang Chuang, Hsiu-Yi Lin, Fu-Chun Yeh, Chia-Hung Kao, Yi-Chang Chen, Chia-Lin Ho, Yenchieh Huang, Hsiao-En Chen, Chih-Wen Yang, Hsuan-Wen Peng
0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications. ESSCIRC (2016)
Tsu-Ming Liu, Yung-Chang Chang, Chih-Ming Wang, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Min-Hao Chiu, Sheng-Jen Wang, Ping Chao, Meng-Jye Hu, Fu-Chun Yeh, Shun-Hsiang Chuang, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen, Chia-Lin Ho, Chi-Cheng Ju
Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems. ICME (2015)
Edwin Naroska, Shanq-Jang Ruan, Chia-Lin Ho, Said Mchaalia, Feipei Lai, Uwe Schwiegelshohn
A novel approach for digital waveform compression. ASP-DAC (2003)
Shanq-Jang Ruan, Edwin Naroska, Chia-Lin Ho, Feipei Lai
Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. ICCD (2002)
Shanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai
Energy analysis of bipartition architecture for pipelined circuits. APCCAS (2) (2002)