Chetan D. Parikh

Publication Activity (10 Years)

Years Active: 2008-2021
Publications (10 Years): 9

Top Topics

High Dynamic Range

Affine Reconstruction

Camera Calibration

Top Venues

Circuits Syst. Signal Process.

Publications

Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen
Deterministic Digital Calibration Technique for 1.5 bits/stage Pipelined and Algorithmic ADCs with Finite op-amp Gain and Large Capacitance Mismatches. Circuits Syst. Signal Process. 40 (8) (2021)
Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen
Digital Calibration of 1.5 bits/stage Algorithmic ADC. ISOCC (2021)
Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen
Deterministic Digital Calibration of 1.5 bits/stage Pipelined ADCs by Direct Extraction of Calibration Coefficients. VLSI Design (2021)
Surya Padma, Sounak Das, Subhajit Sen, Chetan D. Parikh
High Performance Operational Amplifier with 90dB Gain in SCL 180nm Technology. VDAT (2020)
Vamsi Krishna Guduru, Richa Gupta, Bhavani Lakshmi Polareddy, M. Anish Unnikrishnan, Chetan D. Parikh, Subhajit Sen
Wake-up circuit for PAM4 receiver. ISED (2019)
Uma Mukund Kulkarni, Chetan D. Parikh, Subhajit Sen
A Systematic Approach to Determining the Weights of the Capacitors in the DAC of a Non-binary Redundant SAR ADCs. VLSI Design (2018)
Pallavi G. Darji, Chetan D. Parikh
A Calibration Technique for Current Steering DACs - Self Calibration with Capacitor Storage. VDAT (2017)
Chetan D. Parikh, Gopal Agarwal
New technique to improve transient response of LDO regulators without an off-chip capacitor. VDAT (2016)
Pallavi G. Darji, Chetan D. Parikh
Novel Analog Calibration Technique for Current-Steering DACs' Dynamic Performance. Circuits Syst. Signal Process. 35 (7) (2016)
A. Purushothaman, Chetan D. Parikh
A low power low area capacitor array based Digital to Analog Converter architecture. Microelectron. J. 46 (10) (2015)
Pallavi G. Darji, Chetan D. Parikh
Novel Analog Calibration Technique for Current-Steering DACs. Circuits Syst. Signal Process. 34 (8) (2015)
A. Purushothaman, Chetan D. Parikh
A New Delay Model and Geometric Programming-Based Design Automation for Latched Comparators. Circuits Syst. Signal Process. 34 (9) (2015)
Akhil Rathore, Chetan D. Parikh
10 Gbps Current Mode Logic I/O Buffer. VDAT (2013)
Vivek Verma, Chetan D. Parikh
A Low-Power Wideband High Dynamic Range Single-Stage Variable Gain Amplifier. VDAT (2013)
Shagun Bajoria, Vineet Kumar Singh, Raju Kunde, Chetan D. Parikh
Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation. ISLPED (2008)