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Byungki Han
Publication Activity (10 Years)
Years Active: 2014-2020
Publications (10 Years): 5
Top Topics
Cmos Technology
Low Cost
Articulated Object Tracking
Clock Gating
Top Venues
A-SSCC
ISOCC
VLSI Circuits
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Publications
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Jaehong Jung
,
Sangdon Jung
,
Kyungmin Lee
,
Jun-Hee Jung
,
Seungjin Kim
,
Byungki Han
,
Seunghyun Oh
,
Jongwoo Lee
A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTC.
VLSI Circuits
(2020)
Barosaim Sung
,
Chilun Lo
,
Jaehoon Lee
,
Sangdon Jung
,
Seungjin Kim
,
Jaehong Jung
,
Seungyong Bae
,
Youngsea Cho
,
Yong Lim
,
Dooseok Choi
,
Myeongcheol Shin
,
Soonwoo Choi
,
Byungki Han
,
Seunghyun Oh
,
Jongwoo Lee
A Blocker-Tolerant Direct Sampling Receiver for Wireless Multi-Channel Communication in 14nm FinFET CMOS.
A-SSCC
(2019)
Sangdon Jung
,
Jaehong Jung
,
Byungki Han
,
Seunghyun Oh
,
Jongwoo Lee
A 9.4MHz-to-2.4GHz Jitter-Power Reconfigurable Fractional-N Ring PLL for Multi-Standard Applications in 7nm FinFET CMOS Technology.
A-SSCC
(2019)
Byungki Han
,
Jongwoo Lee
,
Seunghyun Oh
,
Jae-Kwon Kim
,
Eswar Mamidala
,
Thomas Byunghak Cho
A 14nm FinFET analog baseband SOC for multi-mode cellular applications with tri-band carrier aggregation.
ISOCC
(2017)
Jongmi Lee
,
Jongwoo Lee
,
Chilun Lo
,
Jaehoon Lee
,
In-Young Lee
,
Byungki Han
,
Seunghyun Oh
,
Thomas Byunghak Cho
A reconfigurable analog baseband transformer for multistandard applications in 14nm FinFET CMOS.
A-SSCC
(2017)
Jongwoo Lee
,
Byungki Han
,
Jae-Hyun Lim
,
Su-Seob Ahn
,
Jae-Kwon Kim
,
Thomas Byunghak Cho
A reconfigurable analog baseband for single-chip, Saw-less, 2G/3G/4G cellular transceivers with carrier aggregation.
A-SSCC
(2014)