Binsu J. Kailath

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 16

Top Topics

Transfer Function

External Memory

Top Venues

Int. J. Circuit Theory Appl.

Publications

Rami Reddy Sowmya, Arige Sumanth, Binsu J. Kailath, Tejendra Dixit
Development of Accurate Model for Memristor-Based Filters and Oscillators: Amplitude, Frequency and Ramp-Rate Dependent Analysis. IEEE Trans. Circuits Syst. II Express Briefs 71 (2) (2024)
Kavitha S, Binsu J. Kailath, Bhupendra Singh Reniwal
CiMComp: An Energy Efficient Compute-in-Memory Based Comparator for Convolutional Neural Networks. DATE (2024)
Dinesh Ganesan, Binsu J. Kailath
Graph-Based Circuit Simulator for Switched Capacitor Circuits. IEEE Des. Test 39 (4) (2022)
Sujitha S, Binsu J. Kailath
High speed Power efficient Vedic arithmetic modules on Zedboard-Zynq-7000 FPGA. Int. J. Circuit Theory Appl. 49 (11) (2021)
G. Dinesh, Binsu J. Kailath
Tree/link method for transfer function and stability analysis of switched-capacitor circuits. Int. J. Circuit Theory Appl. 49 (11) (2021)
Madhuvanthi Srivatsav R, Binsu J. Kailath
A Novel Biphasic Neuron Encoder Implementation. AIIoT (2021)
Sathiya Jothi. S, Binsu J. Kailath
Bistable-Triplet STDP circuit without external memory for Integrating with Silicon Neurons. AIIoT (2021)
T. P. Shivangi, M. Rahimi, Gaetano D. Gargiulo, Binsu J. Kailath, Tara Julia Hamilton
A Silicon Neuron-based Bio-Front-End for Ultra Low Power Bio-Monitoring at the Edge. SSCI (2020)
Sai G. Pavan, Binsu J. Kailath
Reusable Spiking Neural Network Architecture. UEMCON (2020)
Nithya K, Muralidhar Gadamsetty, Binsu J. Kailath
FPGA Implementation of Speech Recognizer for Isolated Words. iSES (2019)
Abdul Majeed Kottampara Kuppalath, Binsu J. Kailath
PLL architecture with a composite PFD and variable loop filter. IET Circuits Devices Syst. 12 (3) (2018)
K. Dheepika, K. S. Jevasankari, Vippin Chandhar, Binsu J. Kailath
Realization of Multiplier Using Delay Efficient Cyclic Redundant Adder. VDAT (2017)
Abdul Majeed Kottampara Kuppalath, Binsu J. Kailath
Nonlinear PFD free of glitches and blind zone for a fast locking PLL with reduced reference spur. IEICE Electron. Express 13 (10) (2016)
Binsu J. Kailath, Dinesh G.
QSCsim - Charge Based Switched Capacitor Simulator. iNIS (2016)
S. S. Karthikeyan, Dinesh G., Binsu J. Kailath
Improved alias rejection using interleaved CIC decimation filter. NEWCAS (2016)
G. Muralidhar, Dinesh G., Binsu J. Kailath
Switched-capacitor circuit simulator in Q-V domain including nonidealities. VDAT (2016)