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Bindi Wang
Publication Activity (10 Years)
Years Active: 2014-2018
Publications (10 Years): 4
Top Topics
Cmos Technology
Clock Gating
Delta Sigma
Low Power
Top Venues
ISCAS
IEEE Trans. Circuits Syst. I Regul. Pap.
ISSCC
ESSCIRC
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Publications
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Kuangyuan Ying
,
Carlos A. M. Costa Júnior
,
Bindi Wang
,
Dusan M. Milosevic
,
Hao Gao
,
Peter G. M. Baltus
A Reconfigurable Receiver with 38 dB Frequency-Independent Blocker Suppression and Enhanced in-B and Linearity and Power Efficiency.
ESSCIRC
(2018)
Yao-Hong Liu
,
Johan H. C. van den Heuvel
,
Takashi Kuramochi
,
Benjamin Busze
,
Paul Mateman
,
Vamshi Krishna Chillara
,
Bindi Wang
,
Robert Bogdan Staszewski
,
Kathleen Philips
An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2017)
Bindi Wang
,
Hao Gao
,
Marion K. Matters-Kammerer
,
Peter G. M. Baltus
Interpolation based wideband beamforming architecture.
ISCAS
(2017)
Bindi Wang
,
Hao Gao
,
Kuangyuan Ying
,
Marion K. Matters-Kammerer
,
Peter G. M. Baltus
Poster: A 60 GHz phased array system evaluation based on a 5-bit phase shifter in CMOS technology.
SCVT
(2016)
Bindi Wang
,
Yao-Hong Liu
,
Pieter Harpe
,
Johan H. C. van den Heuvel
,
Bo Liu
,
Hao Gao
,
Robert Bogdan Staszewski
A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS.
ISCAS
(2015)
Vamshi Krishna Chillara
,
Yao-Hong Liu
,
Bindi Wang
,
Ao Ba
,
Maja Vidojkovic
,
Kathleen Philips
,
Harmke de Groot
,
Robert Bogdan Staszewski
9.8 An 860μW 2.1-to-2.7GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications.
ISSCC
(2014)