Bhavya K. Daya

Publication Activity (10 Years)

Years Active: 2012-2017
Publications (10 Years): 3

Top Topics

Multi Processor

Shared Memory Multiprocessor

Data Parallelism

Network On Chip

Top Venues

IEEE Comput. Archit. Lett.

Hot Chips Symposium

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems. DAC (2017)
Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
Towards High-Performance Bufferless NoCs with SCEPTER. IEEE Comput. Archit. Lett. 15 (1) (2016)
Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling. DAC (2016)
Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon, Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan, Li-Shiuan Peh
SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering. ISCA (2014)
Chia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha P. Chandrakasan, Li-Shiuan Peh
SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect. Hot Chips Symposium (2014)
Sunghyun Park, Tushar Krishna, Chia-Hsin Owen Chen, Bhavya K. Daya, Anantha P. Chandrakasan, Li-Shiuan Peh
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI. DAC (2012)